MCPs Meld Flash And PSRAM

Dec. 1, 2002
The IS75V16F64GS16 and IS75V16F64GS32 math coprocessors (MCPs) combine NOR-type flash memory with 16 or 32 Mb of pseudo SRAM (PSRAM), which is said to provide a lower cost device than an equivalent six-transistor-based SRAM. The PSRAM technology uses

The IS75V16F64GS16 and IS75V16F64GS32 math coprocessors (MCPs) combine NOR-type flash memory with 16 or 32 Mb of pseudo SRAM (PSRAM), which is said to provide a lower cost device than an equivalent six-transistor-based SRAM. The PSRAM technology uses a single-cell DRAM core with a SRAM I/O interface that results in higher density, lower power per bit and a smaller die size. In operation, the PSRAM acts as a buffer and working memory and the NOR-type flash memory stores the data, operation codes, and various communication protocols. The NOR-type Flash memory features user configurable banks. The MCPs support supply and I/O voltages ranging from 2.7V to 3.1V and provide access times of 70 ns for the flash memory and 70 ns maximum for the PSRAMs. Other features include standby and operating current of 70 mA for both the flash and PSRAM. Available in 65-pin BGAs, the IS75V16F64GS16 and IS75V16F64GS32 are priced at $20 and $25, respectively, each/10K. INTEGRATED SILICON SOLUTION INC., Santa Clara, CA. (408) 969-4675.

Company: INTEGRATED SILICON SOLUTION INC.

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