Test The DigRF Interface On Mobile Internet Devices

Nov. 7, 2008
Cell phones and other mobile Internet devices (MIDs) typically use two primary chips—the RF section or radio transceiver and the baseband (BB) section, which handles the digital processing associated with modulation and demodulation and other

Cell phones and other mobile Internet devices (MIDs) typically use two primary chips—the RF section or radio transceiver and the baseband (BB) section, which handles the digital processing associated with modulation and demodulation and other physical-layer functions. Since the radio generates and receives analog RF signals and the baseband chip performs digital operations, some data conversion between the two is involved. The big question has been where to put the analog-todigital and digital-to-analog converters (ADCs and DACs).

Are they in the RF chip, the baseband chip, or maybe both? How can chip vendors make their ICs so any RF chip is compatible with any other baseband chip? The answer lies in creating an interface standard that all parties buy into. Known as DigRF, that standard is now in its fourth (v4) iteration (see “DigRF FAQs,” p. 26). So while the standard now solves the interface problem, the issue turns to how best to test and troubleshoot that interface given its added speed and complexity.

The RDX Test Platform from Agilent Technologies is a complete solution to testing the integration of the RF and baseband ICs in a wireless product using the DigRF v4 (or v3) interface. It’s designed to speed and simplify testing with non-invasive measurements. With this system, digital and wireless engineers alike can perform radio digital cross-domain testing, debugging, and characterization.

This system is the result of the major changes in the DigRF standard that, in turn, are in response to the rapid adoption of the Long Term Evolution (LTE) and WiMAX 4G standards, which enable downlink speeds of more than 300 Mbits/s in multiple-input multiple-output (MIMO) configurations.

The interface between the RF and BB chips is more critical than ever. Version 4 of DigRF is not only faster, it also adds multiple data lanes, power-saving modes, faster power recovery, 8B/10B encoding, and a link layer protocol. Suddenly, the v3 test setups just cannot handle these changes.

The RDX test system supplies tools for digital and RF designers to provide gigahertz cross-domain system characterization. It consists of two key modulesthe N5343A Exerciser and the N5344A analyzer. These modules are housed in a small Agilent N2X mainframe that’s built to accommodate future MIMO designs (see the figure).

Both modules support DigRF v3 as well as v4. The Exerciser has combined stimulus and capture capability up to 1.5 Gbits/s. It also has both speed and mode change tests, bit to packet level generation, and an application programming interface (API) for automation. The Analyzer features clock recovery capability, speed and mode change tracking, simultaneous transmit and receive monitoring, a protocol decoder, and a packet viewer.

SPECIAL PROBES AND SOFTWARE Additionally, the RDX modules offer active probing with ultralow capacitive loading (less than 0.15 pF) and high sensitivity that have a minimum disturbance effect at gigabit speeds. Two probe choices also are available. The N5345A Midbus Probe includes Soft Touch technology for fast probing on prototype boards. With the B5346A flying leads probe solution, designers can monitor the v4 links in space-constrained designs.

The test software, which includes protocol generation and analysis, interoperates with Agilent’s popular Signal Studio software and 89600 vector signal analysis (VSA) software. RF engineers can save some time by using familiar vector signal generation analysis software that supports the RDX modules as well as other signal analyzer and signal sources.

HOW IT WORKS The Agilent RDX system solves the problem that engineers have in testing the interface between the RF IC and the BB IC. It lets mobile handset designers quickly evaluate product behavior by monitoring the digital serial bit stream between these chips.

RDX control packets are decoded and displayed on the system controller PC to provide visibility into the configuration, status, and control flow. IQ data is extracted from the data packets and analyzed using Agilent’s 89600 VSA software. With these capabilities, handset integrators can characterize the interactions between the RF IC and the BB IC to isolate defects and optimize performance.

This is crucial because in some cases, the RF IC and BB IC are developed by different vendors and integrated by an ODM into a final handset design. Also, the RDX lets RF IC development teams characterize their components independently of the BB IC. It can enable the RF-IC manufacturer to prove interoperability with a number of various BB ICs from different vendors as well.

The RF IC transmitter is characterized by developing a digital IQ representation of the RF signal using the signal studio and loading it into the System Controller PC. The exercising module packetizes the IQ data, inserts the specified control packets, and drives the bit stream into the RF IC digital baseband input over the v4 interface.

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The RF IC converts the digital signals into analog and processes the serial bit stream. It then generates an RF signal that is captured by an Agilent MXA signal analyzer and can be analyzed using the Agilent 89600 VSA software. Designers can compare the output RF waveform produced by the RF IC to the intended baseband waveform as produced by the BB IC to characterize transmitter behavior, including the effects of conversion of the data from digital to analog, and the impact of frequency upconversion.

The receiver is characterized by driving a known RF signal into the RF IC Analog RF Rx port using an Agilent E4438C or MXG Signal Source. The RF IC processes the RF signal and renders the digital IQ, which is packetized and pushed out in the v4 digital serial format. The 89600 VSA software, in conjunction with the MXA signal analyzer and the RDX Exerciser and analysis modules, again captures the serial bit stream and extracts the relevant IQ data for analysis. The benefit is that the RDX enables BB IC development teams to evaluate and tune the behavior of their components independently of the RF IC.

Using the acquisition probe, engineers can monitor transactions on the v4 interface generated by the BB IC. Control packets are displayed on the system controller. IQ from the data packets can be evaluated using the VSA package.

The receive path on the BB IC can be characterized by driving the v4 interface with IQ data packets from the stimulus probe. The IQ data packets are created on a logic analyzer using the digital IQ representation of the RF signal generated in Signal Studio.

PRICE AND AVAILABILITY The N5343A and N5344A as well as the software are available for order now. Pricing for each module begins at $15,000. The N5344A and N5345A active probes are also available for order. Pricing starts at $22,000 each. More details are available online at www.agilent.com/find/digrf.

Agilent technologieswww.agilent.com

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