[Technology Report]
Low-Cost FPGAs: The ASIC Alternative
Featuring more gates and embedded memory, budget-priced FPGAs are getting the nod over ASICs in many volume applications.
Now nothing will impede the field-programmable gate array's (FPGA) march into scores of volume applications. New architectures both lower the cost and improve functionality, enabling them to cost-effectively compete with ASICs— even when volumes hit several hundred thousand units and more.
Smaller process geometries that shrink chip size go a long way toward reducing cost. But size isn't the only factor in the cost equation. The chips also must contain enough logic functionality and I/O pads to meet the needs of a wide range of systems.
Also driving the use of programmable devices is the shorter product life of many mass-market products. With ASICs, designers typically must allow for manufacturing cycle times of a month or more. Then there are the nonrecurringengineering (NRE) costs. And don't forget to budget for chips that become useless if the end product is discontinued or the features change so much that the ASIC can't be used in the next spin of the system.
Programmable logic devices combat all of the above issues. These off-the-shelf parts have no significant NRE charges. If the system is designed properly, they can be updated in the field to correct system flaws or add new features. The per-chip costs might be higher than those of an ASIC, but after considering these other factors, FPGAs become a more cost-effective solution.
To further the trend, all companies that offer FPGAs have developed families of low-cost devices that now target mass-market applications. Chip prices start as low as $1.30 apiece in lots of 250,000 units for devices with about 30 kgates of logic.
Today, designers can purchase million-gate FPGAs for less than $10 each in large quantities. For example, a chip with 1.2 million system gates in Xilinx's Spartan 3E family, the XC3S1200E, is sampling now and has a projected price in the second half of 2006 of less than $9 each in lots of 500,000 units. That low price puts the FPGA into direct competition with traditional ASICs.
Nearly every other FPGA vendor also has released budgetconscious families. There's Actel and its ProASIC 3 series; Altera's Cyclone II; Lattice's EC (economy), ECP-DSP ( economy plus digital-signal processing support) and XP families; and QuickLogic's Eclipse II series.
The Spartan-3E family represents Xilinx's seventh generation of Spartan devices, and it specifically targets budget-minded applications. Comprising five members, the family provides capacities ranging from 100k to 1.6 million system gates, up to 231 kbits of distributed SRAM, up to 648 kbits of dedicated configurable RAM blocks, and from 66 to 376 I/O pins (Fig. 1). The E series devices run 30% cheaper than the Spartan-3 chips, thanks to a streamlined architecture.
Designed for consumer applications, the 3E series supports mini-low-voltage differentialsignaling (LVDS) interfaces, PCI 64/66, PCIX, and DDR333 memories. On-chip DSP support comes in the form of dedicated 18-by 18-bit multiplier-accumulator blocks. The 1.2-Mgate XC3S1200E can rip through 9.1 GMACs/s when clocked at 325 MHz. Dedicated digital clock managers (up to eight) permit designers to implement multiple independent clock trees.
Unlike previous FPGAs that required a special configuration memory, the 3E series can take advantage of low-cost serialperipheralinterface (SPI) or standard commodity flash memories. For those systems already equipped with a standard parallel flash memory (with room to hold the configuration code), designers can save on the cost of configuration memory.
Another variation of the Spartan-3 family, the 3L series, stakes a claim as the lowest standby current FPGAs. Devices in the family draw as little as 6 to 10 mA in their hibernate mode, which constitutes up to a 98% quiescent power reduction compared to the Spartan-3 series. Devices in the 3L series pack from 1 million to 4 million system gates and up to 633 user I/O pins.
One serious limitation of the application of the programmable devices is the development software cost- small companies simply can't afford to pay thousands of $$-s yearly -- so FPGa-s etc. are just present one more advantage to the giant companies vs.the start-ups.
Nicholas J. Bucska -September 07, 2005
Your Comments:
Enter the text from the image below
Please refresh the page if you have trouble reading this text.
Search Electronic Design
Web Seminar
Sponsored By:
Title: Read Pacing: A Performance Enhancing Feature of PCI Express Gen 2 Switch Devices
Reprints
