Reprints     Printer-Friendly    Email this Article    RSS        Font Size     What's This?

[ESC 2008]

Web-Based Development Environment Offers Faster Benchmarking



ED News Staff  |   ED Online ID #18749  |   April 17, 2008

Article Rating: Not Rated

TechInsights and Timesys Corp. have jointly launched BenchLab.com, a complete, secure development environment for conducting hardware and software evaluations over the Web via a browser. BenchLab.com combines TechInsights’ VirtuaLab online lab environment and Timesys’ customizable LinuxR building environment to provide system architects and design engineers the ability to test hardware with benchmarks in a real lab environment from anywhere in the world.

The site provides full benchmarking capabilities, without the hassle of obtaining the boards, configuring the boards, or doing any other set up. As a result, users save significant time and cost. Developers can precisely configure the hardware and Linux environment required and can run the lab’s existing benchmarks or upload their own. Using the BenchLab.com portal, users can automatically run the selected benchmarks on a user-specified set of platforms that includes boards as well as user-specified hardware and software configurations.

Users can also generate a summary report that compares benchmark results on different platforms. The development environment reduces risk, time, and resource consumption when benchmarking, enabling more time to be spent on analyzing results.

BenchLab.com will initially launch with the i.MX27 multimedia applications processor board, based on the ARM926EJ-ST core from Freescale Semiconductor and with the 440EPx Power Architecture-based board from AMCC. Additional boards will be added over time. Access to the new portal will be subscription-based, but it will launch as a free subscription site for the remainder of 2008.

www.BencLlab.com




Reprints     Printer-Friendly    Email this Article    RSS        Font Size     What's This?


  • User Advisory Group To Guide Open Verification Methodology’s Evolution
  • DDR3 and DDR2 Memory IP Bolsters SoC Designs
  • PCB Tools Cross-Probe Between Layout And Schematic
  • Constraint-Driven Flow Targets PCB High-Density Interconnects
  • Cadence Abandons Its Bid To Buy Mentor Graphics
  • Model Extractor For CMOS Sports Improved RF/DC Parameters
  • 45-nm Via-Programmable ASICs Add High-Speed I/O Transceivers To Feature Mix
  • Get Ready For NIWeek
    1) SDR Transforms Amateur Radio
    (1080 views today)
    2) DNA In Your Gadgets?
    (902 views today)
    3) Low-Dropout (LDO) Linear Regulators
    (844 views today)
    4) Build A Smart Battery Charger Using A Single-Transistor Circuit
    (288 views today)
    5) A Summary Of The DDR Memory Controller Standard—Wait, There Isn’t One!
    (239 views today)
    ALL TOP 20







    POST YOUR COMMENTS HERE

    Name:

    Email:
    Rate this article:

     less useful more useful 
    1
    2
    3
    4
    5
    Your Comments:

    Enter the text from the image below




    Please refresh the page if you have trouble reading this text.
     
     

    PartFinder

    Find real-time pricing, stock status, same-day/next-day shipping options and more. Brought to you by Digi-Key. Go to PartFinder.    
    GlobalSpec

    PART SEARCH :
    Powered by: GlobalSpec - The Engineering Search Engine
    Sponsored Links

    Electronic Design Europe Electronic Design China EEPN Power Electronics Auto Electronics Microwaves & RF RF Design
    Schematics Find Power Products Military Electronics Featured Vendors EE Events Free Design Resources