Matt Klein is a senior staff engineer in the Advanced Product Division at Xilinx Inc., San Jose, Calif. He holds a BSEE from Case Western Reserve University, Cleveland, Ohio, and an MSEE from Santa Clara University, Calif. Email address: matt.klein@xilinx.com Web site: http://www.xilinx.com
1 results found for Matt Klein, displaying items 1 - 1
September 29, 2005[Ideas For Design] Power Plays A Critical Role In 90-nm FPGA Design
The semiconductor industry’s rapid move toward a 90-nm process node to achieve performance and cost benefits puts enormous pressure on power budgets. Decreasing transistor sizes lead to increased leakage current and, as a result, static power. Dynamic power also rises with system speeds and higher design density, but in a more linear fashion. Today, many designs have 50-50 static and dynamic power dissipation. According to International Technology Roadmap for Semiconductors (ITRS)...