Analog Progresses On And Off The Beaten Path

Dec. 1, 2006
The analog world saw a host of significant but incremental developments in 2006. Take data converters. Back in January, the delta-sigma architecture was enjoying a renaissance as it was applied at remarkably high input signal frequencies, thanks to new d

The analog world saw a host of significant but incremental developments in 2006. Take data converters. Back in January, the delta-sigma architecture was enjoying a renaissance as it was applied at remarkably high input signal frequencies, thanks to new developments in clock stabilization.

For example, at last winter's ISSCC, Xignal disclosed the details of a 640-MHz CMOS continuous-time delta-sigma analog-to-digital converter (ADC) with a 20-MHz signal bandwidth and a 12-bit effective number of bits (ENOB). At the same conference, Analog Devices discussed delta-sigma's advantages for low power, highlighting a four-channel bandpass delta-sigma ADC with 90-dB dynamic range and 8.5-MHz bandwidth at 44 MHz that consumed only 375 mW total.

Further up the frequency range, Sharp revealed a couple of double-sampling delta-sigma ADCs for digital TV receivers. The faster version runs at 100 Msamples/s, with 70.1-dB signal, noise, and distortion (SINAD) over a 4-MHz bandwidth while consuming 34.4 mW from a 1.8-V supply. While these announcements were ISSCC papers, the delta-sigma architecture was being enhanced in actual products as well. For instance, while delta sigmas are great for simplifying anti-aliasing requirements and for shifting noise up out of the band of interest, matching them to sensors isn't always easy.

Their input sampling currents can overwhelm high source impedances or low-bandwidth, micropower signal-conditioning circuits. In 2006, Linear Technology applied its "Easy-Drive" balanced input-current topology to a 24-bit delta-sigma with an eight-channel differential multiplexer ahead of the converter (Fig. 1).

On the high-speed ADC front, Linear Technology pushed 12- bit sampling rates to 250 Msamples/ s while holding power consumption to a modest 740 mW at 2.5 V. Meanwhile, new successive-approximation register (SAR) products were notching up improved performance specifications every three to four months in 2006.

In late summer, Texas Instruments raised the ante on speed by 33% with a 4-Msample/s conversion-rate SAR with a 92-dB signal-to-noise ratio (SNR), ?102-dB total harmonic distortion (THD), 2-LSB integral nonlinearity, 1-LSB differential nonlinearity, 0.5-mV offset voltage over temperature with less than 0.1-ppm/°C offset drift, 0.05% gain error, and 3.3-ppm/°C gain drift.

THE UNEXPECTED
But maybe the best news came from the offbeat stuff, like the surprising convergence of new approaches to signal isolation. TI offered drop-in replacements for optical isolators that achieve excellent isolation by means of monolithic capacitors, rather than an optical path. The caps reside on a receiver chip inside a module containing separate CMOS driver and receiver dies bond-wired together.

The TI isolators challenged ADI's earlier planar-transformer devices in terms of magnetic-field immunity and standard optocouplers in terms of power consumption. But later in the spring, ADI struck back with a new series of isolators that not only integrated planar transformers on silicon but also included an isolated 5-V, 50-mW power supply for the sensor they were isolating (Fig. 2). At that point, we had optoisolators, capacitively coupled isolators, and planar-transformer isolators.

Subsequently, Silicon Laboratories announced a digital isolator family that employs RF. Each chip uses four 2.1- GHz transceiver pairs and a transformer. Each input modulates the carrier using on/off keying. The corresponding receiver demodulates the input state according to its RF energy content and applies the result to an output driver. The parts double the speed of optoisolators while consuming less than 12 mA per channel at 100 Mbits/s.

Yes, 2006 was a good year for unusual parts. Advanced Linear Devices proposed its precharged floating-gate MOSFETs as very fast alternatives for normally closed relays, as the MOSFETs consume virtually zero power. Potential applications include fail-safe circuits in alarms, battery backup circuits, energy harvesting, alternative energy, and similar applications.

Thanks to the pre-charged floating gates, these MOSFETs have ?0.4-V gate-threshold voltages (VTH). These devices control the gate in a fashion similar to the company's enhancement-mode MOSFETs, except the threshold voltage is shifted by a fixed negative amount. Otherwise, they work like ordinary MOSFETs.

Not so unusual, but definitely in a niche, the world of automated test equipment (ATE) pin drivers saw a doubling of drive capability in a new quad pin-electronics driver/window comparator from Intersil. The chip drives 1 A (typical) at up to 18 V and runs up to 50 MHz (guaranteed minimum). A low 7-½ output resistance also yields fast rise and fall times.

THE BIGGEST DEVELOPMENT
But maybe the best news of 2006 wasn't the different chips and discretes themselves, but one common factor across the analog product spectrum. Chip companies internationally have responded to the global market by adapting their design approach.

Competition in creating incremental improvements in datasheet specs has been replaced by competition in making analog parts as easy as possible to design with, with features and design support that permit differentiation and justify higher analog signal processors (ASPs). The generic jellybean analog component is being replaced by parts that offer OEMs just what they need to create new products for their customers but keep the "secret sauce" in the hands of the integrated device manufacturers (IDMs).

That makes it win-win for IDMs and OEMs while giving both parties the opportunity to keep developing new features and technologies. And that's what keeps engineers (and tech editors) employed.

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