Avoiding Noise: 10 Layout Tips

Feb. 1, 2007
Return paths The physical area created by the signal and return path determines the amplitude of energy that’s radiated unintentionally, so minimize the area of these return loops. Single-ended signals should be routed adjacent to a ground plane.

Return paths
The physical area created by the signal and return path determines the amplitude of energy that’s radiated unintentionally, so minimize the area of these return loops. Single-ended signals should be routed adjacent to a ground plane.

Ground loops
Multiple grounds are a necessary evil when circuits are functionally differentiated. You end up with small voltage potentials between the grounds that drive common-mode currents back through the signal paths. Consider using a common-mode filter to eliminate this unwanted current.

Cables and pinouts
Make sure that differential signals are routed to twisted-wire pairs that are twisted or adjacent ribbon wires.

Components
Consider any component’s switching noise when evaluating tradeoffs between cost and EMC performance.

Decoupling capacitors
Use decoupling capacitors near IC power connections. Don’t use fewer than the manufacturer’s suggested number of capacitors. Short traces to the capacitor and interconnecting vias is essential. Spend time with an electromagnetic-compatibility (EMC) engineer to come up with the best layout practice for your design.

Layer stack-up
To create a return path while minimizing loop area and enhance decoupling between power and ground, try to ensure that every signal layer on a circuit board is adjacent to a power or ground layer. Also, place signal layers for high-speed routing in between ground planes. If two ground planes aren’t available, a solid power plane with an adequate return plane will act as an ac ground.

Critical signals
Make a list of EMC-critical signals, including clocks, high-speed buses, and any other periodic signals with fast edge rates and then minimize the distance these signals must travel. Control the impedance of these signals by minimizing layer transitions and reference-plane transitions. Always route these signals prior to performing any other manual or auto routing of less critical signals and space them away from the edge of the board and any undriven nets.

Sectioning the design
If you have functional sections scattered around the board, you may still use common power and ground planes, but consider notching them to control where return current energy flows.

Frequency sources
With multiple oscillators, harmonic energy will be additive. Reduce emissions by ensuring that the harmonics of independent oscillators do not overlap and account for the additive emissions of different orders of harmonics.

Drivers
Don’t simply configure components such as an FPGAs to source more current necessary to ensure signal integrity. Also, consider the edge rate of the driver. If you don’t need sharp transitions, consider decreasing the edge rate.

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