Clock, Data Multiplexers Sport Ultra-Low Jitter

Oct. 14, 2002
Three high-speed, PECL/LVPECL multiplexers meet the ultra-low jitter and skew demands of Sonet/synchronous digital hierarchy (SDH) communications systems, high-end enterprise server applications, and automated test equipment (ATE) systems. The...

Three high-speed, PECL/LVPECL multiplexers meet the ultra-low jitter and skew demands of Sonet/synchronous digital hierarchy (SDH) communications systems, high-end enterprise server applications, and automated test equipment (ATE) systems. The SY100EP56V dual-differential 2:1 multiplexer comes in a 20-pin TSSOP package. It can be used as a plug-in replacement for On Semiconductor's MC100EP56DT. Offered in a 20-pin TSSOP package, the SY100EP57V differential 4:1 multiplexer replaces On Semiconductor's MC100EP57DT. The SY100EP58V 2:1 multiplexer comes in an eight-pin SOIC or MSOP package and replaces On Semiconductor's MC100EP58D/DT. All three multiplexers deliver low random jitter and deterministic jitter of less than 1 psRMS and 25 ps p-p, respectively. Output rise and fall times measure less than 230 ps. All three multiplexers operate from a wide supply voltage between 3.0 and 5.5 V. They're guaranteed over the −40°C to 85°C industrial temperature range. The SY100EP56V and SY100EP57 start at $4.98 each in quantities of 1000 pieces. Pricing for the SY100EP58V starts at $3.95 in similar quantities.

Micrel Semiconductor
www.micrel.com; (408) 944-0800

Sponsored Recommendations

Comments

To join the conversation, and become an exclusive member of Electronic Design, create an account today!