Electronic Design

Composite Amp Had Low Noise, Drift

Typically, FET input operational amplifiers have desirable characteristics such as good frequency response, low input bias current, and low input bias-current noise compared to bipolar input amplifiers.

On the other hand, bipolar operational amplifiers offer such noteworthy characteristics as low input offset voltage, low input-offset-voltage drift, and low voltage noise.

This composite amplifier circuit (see the figure) offers the best of both worlds. It achieves low current and voltage noise, combined with low input offset voltage and drift, without degrading the overall system's dynamic performance. Compared to a standalone FET input operational amplifier, the composite amplifier circuit exhibits a 20-fold improvement in voltage offset and drift.

In this circuit arrangement, A1 is a high-speed FET input op amp with a closed-loop gain of 100 (the source impedance was arbitrarily chosen to be 100 kΩ). A2 is a Superßeta bipolar input op amp. It has good dc characteristics, biFET-level input bias current, and low noise. A2 monitors the voltage at the input of A1 and injects current into A1's null pins. This forces A1 to have the input properties of a bipolar amplifier while maintaining its bandwidth and low input-bias-current noise.

Update by Paul Brokaw
ADI Fellow, Analog Devices Inc.

We often need to combine the best of two elements without also getting the worst of both. The tradeoffs necessary to achieve the most-precise input characteristics in an IC op amp, though, often limit the bandwidth or speed of response. Therefore, it's not surprising that high-speed amplifiers have less than the most precise input characteristics in many instances.

On the other hand, two amplifiers may be combined to yield both high speed and high accuracy. As presented in the original Idea for Design, a precise amplifier may be used to control the low-frequency-precision parameters, and a fast amplifier can be used to complete a precise, fast composite amplifier.

Simple cascading of the two amplifiers wouldn't give us the results we want, however, because such a cascade wouldn't be frequency stable for any closed-loop gain substantially less than the open-loop gain of the fast amplifier. The low-frequency poles that limit the bandwidth of the precise amplifier would conspire with the roll-off of the fast amplifier to destabilize the closed-loop cascade amp.

To see why this is the case, consider the simplified circuit drawn in Figure A. Here, the basic amplifier function is illustrated by the idealized amplifiers marked Gain 1 and Gain 2. These ideal, wide-band amplifiers are shown with an associated RC network to simulate the inevitably finite bandwidth of a real amplifier as a simple pole. In some sense, these are best-case models, because real amplifiers will have additional poles. Usually, though, these will be at some considerably higher frequency. On the right side, the buffer amp represents the internal buffer which would be part of a second IC op amp, following the internal high-impedance node.

This cascade amp has the two-pole transfer function illustrated by Figure B. It's only marginally stable, as indicated in the idealized closed-loop response plot, which in most practical realizations will be found to oscillate.

The loop gain, or Bode plot, depicts for us why we should expect the closed-loop response peak (Fig. C). The overall loop gain shows that the product of the two poles with phase margin, VP(OUT) − VP(FB), becomes vanishingly small at about 400 kHz where the loop gain, (VDB(OUT) − VDB(FB)) − 40 dB, crosses zero. Additionally illustrated, is the response between other points of interest in the loop.

Yet, the simple change of a single connection—to the inverting input of the Gain 2 amplifier—introduces the zero shown in the loop-gain function (Fig. D). This corrects the open-loop response so that the circuit is closed-loop stable, with the response shown in Figure E.

This change is brought about by the alignment of the amplifiers. While in Figure A the amplifiers are in series and their responses multiply, in Figure D, they are in a way, in parallel. Thus, their responses add.

Note that the gain of the first amplifier adds to the signal at the input of the second amp at low frequencies. But, the inverting input of the second amp directly accesses the summing node. Its noninverting input is effectively "ground" referenced at high frequencies. This is because at high frequencies the response of the first amplifier is negligible and its output signal is insignificant in comparison to the signal at the FB node.

In the Bode plot of the modified circuit, the loop phase never drops below about 35° (Fig. F). Furthermore, the actual phase margin at unity gain is closer to 85°.

To simplify the explanation, the amplifiers shown in Figures A and D are all ground-referenced inverting amplifiers. For some applications, an uncommitted differential input is required. The circuit of the original Idea for Design provides this more-general input structure, and is shown implementing a noninverting amplifier.

In this circuit, the precision amplifier, A2, drives what is in effect, a second input stage of the fast amplifier, A1. That is, the nulling terminals of an IC op amp behave like a second input stage in series with the normal input. The amplifier will come to equilibrium at a voltage that's the sum of the normal input VOS and the differential voltage at the null pins. Usually, the null-pin voltage is adjusted to exactly compensate any residual VOS at the normal input, and eliminate its effect on signal error. But, signals applied to this input also can be used to act in series with signals applied at the normal input.

In the original circuit, both amplifiers have an inverting input connection to the feedback network. At low frequencies, A2 will adjust the null-pin differential voltage to cancel the offset of A1. At higher frequencies, the output response of A2 will become less than the normal error signal present at the inputs of A1. Thus, this second signal will dominate. The result is a loop-gain zero, like the one in the simplified Figures D and E, which stabilizes the closed-loop gain.

The circuit of the original Idea for Design, therefore, teaches us how to combine the precision of the AD705 with the speed of the AD843, adding the gains in the manner of the simplified diagrams. But, by using the null terminals as an auxiliary input, it performs this without limiting the composite to ground-referenced applications. In conclusion, this "timeless" idea is as useful today as it was when the circuit was originally published.

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