DAC Aids Wireless Infrastructure

Current and next-generation cellular networks need high-performance, low-cost wireless-infrastructure components. A programmable dual DAC5686 plans to meet this need. This digital-to-analog converter (DAC) supports up to four wideband-CDMA (W-CDMA) carriers. Compared to competitive solutions, it claims that it requires 50% less power. The DAC offers designers three unique modes of operation, as well as three separate clock modes. It also allows for a low-input data rate with a programmable interpolation rate of 2X to 16X and an output rate of up to 500 MSamples/s.

By coupling with four additional devices, this DAC promises to simplify the design time required for the wireless-transceiver system of the base station. The 12-b, 80-MSample/s ADS5410 ADC offers low power and low cost. The THS4271 high-speed operational amplifier delivers ultra-low distortion with ultra-low noise. A new low-phase-noise clock synthesizer—the CDC7005—provides multiplying, dividing, and jitter cleaning for optimal timing performance. Rounding out the system is the digital downconverter and upconverter, the GC5016. It connects seamlessly to the DAC5686.

The DAC5686 promises to offer superior performance for single- and multi-carrier W-CDMA operation. For single-carrier W-CDMA signals, the DAC5686 has demonstrated an ACPR of better than 68 dBc at frequencies up to 122.88 MHz. For dual-carrier W-CDMA signals, an ACPR of 71 dBc or more is possible to up to 61.44 MHz. Contact the company directly for pricing information.