Electronic Design

Fast, 10-Bit ADC Taps 0.25-μm CMOS Process

Combining a deep-submicron CMOS process with a pipeline architecture, STMicroelectronics has readied a high-speed, very low-power analog-to-digital converter (ADC) family that operates from a single 2.5-V supply. The TSA1002 consumes just 50 mW at 50 Msamples/s and 10-bit resolution. In addition to its pipeline architecture, the TSA1002 employs digital error correction to guarantee 9.4 effective bits at 50 Msamples/s and a 15-MHz signal input.

The device's typical SFDR is 72 dB at 50 Msamples/s and a 5-MHz input. A built-in reference voltage simplifies design and minimizes external components. An external reference can also be used. Other features include a 2-V p-p differential input range, tri-state output buffers, and a data-ready signal that validates the output and permits synchronization with other devices.

A version at 20 Msamples/s with 20-mW power consumption at a 2.5-V supply, the TSA1001, is available. The TSA1001 and TSA1002 are both housed in 48-pin TQFP packages, and they're offered in commercial and extended temperature grades. In 1000-unit lots, the commercial-grade TSA1002 costs $5.10, and the lower-speed commercial-grade TSA1001 costs $3.80. Their evaluation boards cost $120 each.

STMicroelectronics, Lexington Corporate Center, 10 Maguire Rd., Bldg. 1, Lexington, MA 02421; (781) 861-2650; www.st.com.

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