Systems requiring power conversion and level detection employ full-wave rectification, traditionally provided by a diode bridge. But diode bridges consume a significant amount of board space and reduce signal amplitude. An alternative solution involves using separate amplification for the positive and negative half-cycles and a comparator to switch between them.
This solution typically requires numerous ICs and can suffer from delay mismatch between the two amplification paths. Because of this mismatch, the multichip solution is acceptable only for low frequencies—where the delay mismatch is an insignificant percentage of the signal wavelength. Thus, designers who require a higher-frequency, broadband solution default to the diode bridge configuration.
A third alternative uses an integrated multiplexer and amplifier along with a high-speed comparator (Fig. 1). Since the amplifiers, switches, and final amplification are integrated in one device, delay mismatch issues are eliminated.
This circuit's frequency limit depends on the propagation delay of each stage.
The ISL59421 multiplexer amplifier used in the example adds 20 ns of delay for switching between the inputs. The external, high-speed comparator (ISL55141) typically adds 9.5 ns or so to that. Figure 2 shows the effect of these delays.
When the input crosses 0 V on the negative half cycle, the output waveform exhibits a plateau whose length depends on the sum of the propagation delays through the loop. The small vertical step in the output's positive half cycle shows that the loop has recovered from the switching operation and the output amplitude again equals the absolute value of the input voltage.
Since the delay is a fixed amount, the distortion will increase as frequency rises. Therefore, the maximum operating speed will be determined by the amount of distortion the application can tolerate. In this 500-kHz example, the 30-ns delay causes distortion for 1.5% of the period.