The drive toward multicarrier and multimode basestations and direct-IF transceiver designs is motivating data-converter suppliers to keep propelling the performance envelope of digital-to-analog converters (DACs) to greater heights. These applications demand better resolution, faster update rates, and higher output frequency, in addition to superior ac, noise, and dynamic performance, over a much wider output bandwidth.
Because the power budget is limited as usual, the improved performance must arrive without penalizing the device's power consumption. Furthermore, as these devices are being driven closer to the antenna, designers seek system-level functionality on-chip to cut the component count of the system. While the need is for greater integration on the same piece of silicon, all of the bells and whistles must be packed on a smaller semiconductor die size.
Attaining these objectives was never easy or trivial, but it seems to only get more complex with time. Nevertheless, undaunted by the emerging challenges, developers continue to advance their product lines with clever tweaking methods, better layout, and augmented fabrication processes. Novel architectures and mixed-signal design techniques are being merged with finer CMOS and biCMOS process technologies to meet the end goals.
A major player setting the pace in this arena is Analog Devices Inc. (ADI). This manufacturer continues to refine its architecture and CMOS processes to push the performance bar of its oversampling 14-bit transmit DAC family to new levels. Since the launch of a leading TxDAC family member last summer, ADI has made substantial progress in this line of wideband DACs to handle the broadband and multicarrier needs of multistandard and multimode cellular infrastructure applications (see "Wideband DAC Fosters Multicarrier, Multimode Transmission," Electronic Design, June 14, 1999, p. 37).
By revamping the architecture and tweaking the CMOS process, the supplier has boosted the speed, resolution, and noise performance of oversampling segmented-current-source transmit DACs to achieve 16-bit and better resolution with the ability to handle faster input and output data rates. Additionally, it has successfully set the tone for multichannel DACs required for digital quadrature modulation techniques deployed in these emerging wireless systems. ADI has demonstrated the ability to pack two well-matched high-resolution wideband DACs on a single CMOS chip.
A recent result of this ongoing progress at ADI is the AD9777. Flaunting 16 bits of resolution and 160-Msample/s conversion speed, this newest member of the TxDAC family features selectable 2X/4X/8X interpolating filters, along with dual 16-bit DACs on the same piece of silicon. Because the DAC is designed to handle I and Q data of a quadrature-modulated incoming signal, the converter offers two independent half-band filter channels. Each channel provides up to 8X interpolation (Fig. 1).
In addition to higher integration, the converter's noise and other ac characteristics have undergone refinements. For instance, the noise floor has been lowered, and in-band and out-of-band distortion has been suppressed over a very wide bandwidth. The DAC's inter-modulation distortion (IMD) has been lowered by 3 to 5 dB, and its phase noise further cut by 12 dB in comparison to previous introductions. According to Stephen LaJeunesse, marketing engineer for ADI's high-speed data converters, some of the implemented improvements include reconfiguring the switch cells of the segmented-current-source DAC, bettering capacitive coupling, and resizing the transistors for faster switching characteristics.
Also, LaJeunesse says that the steep transition band and good stop-band rejection of the three user-selectable filters simplifies reconstruction-filter requirements for the output signal. Unlike single-carrier transmission, these on-chip filters enable broadband multicarrier architectures to suppress inband noise and distortion while simplifying the reconstruction analog filter that follows the DAC.
Because the AD9777 is crafted for quadrature modulation, it provides up to 8X interpolation half-band FIR filters for each I and Q data path. Aside from the flexibility afforded by the digital interpolating filters, this converter also incorporates a digital quadrature modulator that lends itself to rejecting image frequencies. "In conjunction with an external analog quadrature modulator, a complex modulation scheme is realized that suppresses the lower image, while the main band is increased in power by 3 dB," LaJeunesse explains. An internal test conducted by ADI engineers indicates that a sideband suppression of 30 to 40 dB can be obtained with this scheme (Fig. 2).
"However," LaJeunesse adds, "local-oscillator leakage then becomes a problem. But it can be filtered out using a single inexpensive SAW filter stage. With a sideband suppression of about 40 dB, cascaded SAW filtering is unnecessary." In this application, the modulation frequency can be programmed via the SPI port for rates of fS/2, fS/4, or fS/8, where fS is the DAC update rate.
Additionally, the interpolation filters enable higher oversampling using the same internal clock that, in turn, further enhances the signal-to-noise ratio (SNR) of the converter. To handle the entire cellular band of the multicarrier basestations, the converter offers a spurious-free dynamic range (SFDR) of 75 dB over a 2- to 35-MHz band. Plus, it achieves 73 dB of adjacent-channel power ratio (ACPR) at an IF of 16.25 MHz. Typical differential nonlinearity for the device is ±1 LSB at 16-bit accuracy.
While the AD9777 is a dual-channel DAC configured to accept digital quadrature-modulation (I and Q) data and generate a quadrature-modulated IF signal along with its orthogonal representatives, it also can be operated in a direct IF mode. The device provides IF transmission frequencies of 70 MHz and higher in this mode and enables designers to cut a mixer stage, thereby lowering the cost for cellular communications systems.
An internal phase-locked-loop (PLL) multiplier generates the desired high-frequency synchronous clock up to 400 MHz for a higher update rate. It can be disabled when a more-precise external source is needed. With an external source, an internal programmable divider provides the appropriate clock for easy data interfacing. The converter also comes with a built-in 1.2-V reference. Operating from a single supply of 3.0 V, the AD9777 consumes about 800 mW. It comes in a 68-pin LQFP. Sampling now, the 16-bit interpolating dual DAC is expected to go into production by next summer.
Meanwhile, the company roadmap shows newer parts with a refurbished noise floor, phase noise, and IMD performance over previous high-speed interpolating TxDAC members. A recent addition to this line of transmit DACs is the interpolating 14-bit AD9772A.
ADI boasts that the AD9772A offers a 6-dB improvement in noise floor, a 10-dB incremental increase in IMD performance, and a 6- to 8-dB reduction in PLL phase noise. As a result, the spectral noise density has improved to 153 dBc/Hz. Also, the ACPR rating has been boosted by another 8 dB for this latest 14-bit TxDAC member, and its input data rate has been pumped to 160 Msamples/s.
Selling for the same price, the AD9722A is an enhanced drop-in, pin-compatible replacement for the older AD9772. With improved performance, it's well suited for multicarrier GSM and IS-136 systems, as well as for wideband CDMA and IS-95 systems, claims the manufacturer.
Concurrently, ADI designers are exploring the route to beyond 16-bit resolution for high-speed wideband interpolating transmit DACs. Although further details were unavailable at the time that this report went to print, more information will likely follow by the second half of next year. To set the trend for lower supply voltages and power consumption, with substantial gain in overall performance, ADI designers are migrating to finer CMOS geometries. Although 0.35-µm CMOS will continue to serve DAC families for at least another year, preparations are under way to adopt 0.25-µm features by 2002.
Other suppliers racing to win sockets in the emerging digital cellular infrastructure and handset applications include Texas Instruments Inc. (TI), Intersil Corp., Maxim Integrated Products Inc., Philips Semiconductors, Signal Processing Technologies, and Pentek Corp. By acquiring Burr-Brown, TI has quickly moved up the high-performance scale. The maker has obtained expertise in 14-bit data converters that complement its 12-bit line. It now intends to combine its design and fabrication prowess to further propel these devices beyond the present resolution and speed levels while simultaneously enhancing their dynamic range, bandwidth, and noise specifications.
The company is readying multichannel DACs for communication systems based on digital quadrature modulation. These applications demand better matched high-speed wideband DACs for handling I and Q modulation data. With the ability to address those requirements, TI is preparing 10-, 12-, and 14-bit dual-channel DACs. The company expects to begin unwrapping its dual-channel high-resolution versions early next year.
Meanwhile, TI is inclined toward interpolating-DAC solutions for transmit channels of digital communication systems. Designers at the company expect to bring this capability on board 14-bit high-speed wideband DACs by the first half of next year. In the works is a 4X interpolating 14-bit DAC with an output data rate of 400 Msamples/s. This converter will support high-frequency outputs in the 70- to 100-MHz range, meeting the Nyquist requirements.
"The overall performance is im-proved with interpolating DACs," notes Ed Fullman, TI's strategic marketing manager for high-speed data converters. "By increasing the sampling rate, we can improve the dynamic performance at high frequencies and low voltages. However, a lot of tradeoffs must be made before a solution will be realized," he adds.
Presently, the DAC904 is TI's only 14-bit 200-Msample/s DAC solution for cellular basestations. TI plans to extend this line with faster and better models. The advanced segmented current-source architecture of the DAC904 is tailored to deliver a high spurious-free dynamic range (SFDR) for single-tone as well as multitone signals employed in the transmit path of communication systems. It's rated to provide an SFDR of 67 dB at a 100-Msample/s data rate and a 20-MHz output frequency. The next logical step for TI is to raise the bar on dynamic performance, as TI's designers move to speedier versions with lower noise and distortion characteristics.
The DAC904 offers a high-impedance (200-kΩ) current output with a nominal range of 20 mA. The full-scale output is adjustable over a 2- to 20-mA span with a single external resistor without compromising the specified dynamic performance.
Other features of the 14-bit model include low glitch energy, differential current outputs, an internal 1.24-V bandgap reference, an optional external reference, edge-triggered latches, a power-down mode, and a wide single-supply range of 2.7 to 5.5 V. Based on a 0.5-µm CMOS process, the DAC904 is rated to consume 170 mW (typical) at a 5-V supply. For the noncontinuous power-down mode, it requires only 45 mW. This 14-bit DAC comes in SO-28 and TSSOP-28 packages.
Existing and emerging digital communication transmitters aren't the only targets for these speedier wideband DACs. Like ADI, TI also predicts its use in test instrumentation, waveform generation such as direct digital synthesis (DDS), arbitrary waveform generators, and other imaging and control applications.
With their eyes set on the expanding global digital radio markets, designers at Intersil have spearheaded efforts to extend the CommLink family of high-speed high-resolution data converters, programmable modulators, and fixed-function DSPs into the broadband wireless and cellular space. Specifically for the transmit chain of the communication system, Intersil has readied 130-Msample/s 12- and 14-bit high-speed DACs that feature adequate SFDR at 100 Msamples/s, 175 mW consumption at a 5-V supply, and a maximum of 20 mA of full-scale output current with low glitch energy and high-frequency domain performance.
Like others, Intersil's designers have taken the segmented current-source route and combined it with a 0.5-µm CMOS process to accomplish the desired specifications. According to the company, all CommLink DACs are pin-compatible for upward migration.
The 14-bit 130-Msample/s HI5960, the high-end member of this family, operates from a single 3- to 5-V supply. It achieves a typical SFDR of 63 dBc at a sampling rate of 100 Msamples/s and an output frequency of 20.2 MHz. Typical THD at a 5-V supply and a 100-MHz clock frequency is −71 dBc.
While the present generation of parts is limited to single-carrier, narrow-band types of applications, Intersil's designers would like to enter the multicarrier, multistandard fray. For that, Intersil plans to more than double the conversion speed of present converters, as it prepares its next-generation models with better SFDR and dynamic re-sponse over the cellular bandwidth. On-chip interpolation filters are on the drawing board too for these upcoming high-speed DACs. Intersil expects to launch the newcomers by the first half of next year. In addition, the company is pursuing the idea of packing matched DACs on the same chip as standalone devices for multichannel needs.
For designers of digital modulation schemes in wireless systems, Intersil has combined a 12-bit dual-channel DAC with shaping and interpolation filters, a complex modulator, and numerically controlled oscillators (NCOs) on a single silicon substrate. The outcome of this integration is a wideband programmable modulator, the HSP50415, which supports a variety of modulation schemes (Fig. 3). It accepts an input quadrature programmable data stream at programmable symbol rates up to 25 Msamples/s and outputs a modulated quadrature data stream up to 100 Msamples/s. Essentially, it's a quadrature amplitude modulator (QAM) and an upconverter in a single package for wideband digital modulation applications.
Primarily employed for converting baseband to IF in multichannel radio applications, the HSP50415 supports QPSK, 16-256 QAM, and a quadrature PM format. The high-output sample rate generates a high-IF output from the 12-bit on-chip DACs.
According to the HSP50415's developer, the programmable carrier NCO and I and Q shaping FIR filters allow the input and output sample rate to have a noninteger or variable relationship. This makes the architecture flexible, thereby permitting communication systems to handle multiair interface standards. "In short, it's a complete modulation system that modulates the baseband data onto a programmable-carrier center frequency," says Glenn Oliver, CommLink product marketing manager at Intersil. "Consequently, it significantly cuts design time, system cost, and time-to-market."
The HSP50415 modulates the symbol data at the final sample rate onto a carrier signal that's tunable from 0.025 Hz to 50 MHz. To compensate for the (sin x)/x roll-off of the DACs, the wideband modulator provides optional x/(sin x) filters. Plus, the system- or DAC-induced gain imbalances between I and Q signals can be corrected prior to the output. Other key highlights include an SFDR of over 70 dB at an output sample rate of 100 Msamples/s, a constellation mapper, 20 mA of full-scale output current, and 3.3-V supply operation. The HSP50415 comes in a 100-lead MQFP.
Furthermore, Intersil has exploited its expertise in high-speed, high-resolution DACs to generate direct digital synthesizers (DDSs) required in a variety of wireless communications equipment. Integrating a 48-bit programmable carrier NCO, a 125-Msample/s 14-bit DAC, and a comparator on a monolithic CMOS die, the supplier has produced a complete, digitally controlled frequency synthesizer (Fig. 4). This standalone DDS, labeled ISL5314, presents an attractive alternative to analog voltage-controlled oscillators for agile-frequency synthesis applications. "A DDS system's output frequency and phase can be precisely and rapidly manipulated under digital process control," Oliver says.
The ISL5314 is accompanied by a parallel control interface for fast tuning, as well as a serial control interface. While the parallel processor interface is an 8-bit write only for center and offset frequency control registers, the serial interface loads the 40-bit frequency tuning word. The synthesizer is accurate to 0.4 µHz, Intersil claims. Its spurious performance is rated at an SFDR of 75 dBc at a 125-MHz clock frequency and output of 25 MHz. Power consumption is below 500 mW at a 3-V supply. The ISL5314 comes in a 48-pin LQFP package.
Emerging wideband multicarrier applications have also prompted Maxim Integrated Products to quickly move up the performance ladder. Maxim intends to leverage its high-speed expertise in data conversion to create faster high-resolution DACs capable of providing high-frequency output with the very low power re-quired in these applications.
Currently, Maxim is revamping the update rates of 8- and 10-bit 40-Msample/s DACs to 150 MHz. An 80-Msample/s version is in the making, but it's not expected to be released before the end of next year.
The existing MAX5180 series of monolithic CMOS DACs, with 40-MHz update rates, includes 8- and 10-bit models with voltage and current outputs. They consume only 18 mW from a 3-V supply. For I and Q baseband signal reconstruction, the series includes monolithic 10-bit dual DACs too.
As it prepares next-generation DACs, Maxim is exploring techniques to migrate to 0.35-µm CMOS. The supplier intends to increase the functionality on board while tailoring its next-generation wideband DACs for specific communications applications.
Using a segmented current-source architecture, Signal Processing Technologies has pushed the specifications for its DACs to 16 bits with an update rate of 200 MHz. The SPT5510 boasts an ultra-fast settling time of 25 ns to 14 bits, and 35 ns to 16-bit accuracy, with low glitch energy of 30 pV-s. It features true 16-bit linearity, with differential nonlinearity of ±0.6 LSB and integral nonlinearity of ±0.75 LSB.
To serve system designers, board maker Pentek Inc. has been tapping these advances to develop multichannel narrow/wideband digital receivers and transmitters for digital communication systems. To specifically link a DSP system to a radio transmitter, Pentek has developed a VIM module that translates digital baseband signals to IFs as high as 80 MHz. For that, its model 6229 combines a quadrature upconverter with built-in interpolation filters and dual 12-bit oversampling DACs on a single board. It attaches directly to VIM-compatible processor boards.
Thanks to wideband high-resolution and high-speed DACs, a single device can now generate multiple high-frequency carriers with minimal interference and noise. Infrastructure equipment designers are reaping those benefits. As a result, single basestation systems with the ability to handle multiple air-interface standards are a reality. The threat of discarding old equipment for newer standards is a thing of the past.
|Companies Mentioned In This Report|
Analog Devices Inc.
Maxim Integrated Products Inc.
Signal Processing Technologies
Texas Instruments Inc.
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