Electronic Design

Modular SiGe BiCMOS Device Exploits 0.25-μm CMOS Technology

Researchers at Lucent Technologies' Bell Laboratories have successfully combined bipolar transistors based on silicon germanium (SiGe) with the leading-edge 0.25-µm CMOS process to create a modular biCMOS technology. By adding just four mask layers over the core CMOS process, the scientists created a high-performance, super-self-aligned (SSA), graded-base SiGe bipolar npn transistor (see the figure). Its peak cutoff frequency, fT, is 51 GHz, while maximum oscillation frequency, fMAX, is 53 GHz. The researchers indicate that cutoff frequencies over 60 GHz can be obtained for smaller transistors at currents as low as 450 mA.

The four additional masks over the core CMOS process are designed for a 2.5- or 3.3-V npn transistor. Five more masks are required over the core CMOS steps for mixed-voltage transistors. Presented at last month's International Electron Devices Meeting in Washington D.C., the researchers' paper notes that the SSA structure reduces the base resistance and base-to-collector capacitance, resulting in the higher fMAX.

"We have taken pioneering research in SiGe technology from Bell Labs and deployed it as a process module in the same cost-effective CMOS-based technology we use to fabricate our system-on-a-chip (SoC) for communications applications," says Mark Pinto, chief technical officer of Lucent's Microelectronics Group, Allentown, Pa. Kevin Kolwicz, director of Lucent's platform technology, says that the SiGe devices tap the same CAD tools and ASIC cell and macrocell libraries. So, these devices can be combined on the same chip with DSPs, RF functions, memory blocks, and other CMOS-based IP cores for SoC implementation.

This low-cost graded-base SiGe biCMOS process has been optimized for leading-edge synchronous optical network (SONET) and synchronous digital hierarchy (SDH) standards supporting data rates of 10 Gbits/s and higher. But it's also suited to other high-speed wireline and wireless communication applications.

To demonstrate the technology's viability, the researchers built a 4:1 multiplexer/demultiplexer for OC-192 and OC-48 systems. Lucent plans to move the SiGe biCMOS process from R&D to commercial fabrication within a year. Consequently, it intends to qualify the process by the second quarter. Though Lucent is developing the low-cost SiGe biCMOS devices at its facility in Orlando, Fla., the technology can be extended to any of its facilities equipped with the COM-1, 0.25-µm CMOS process. The firm has no plans to license the technology or provide foundry services. By 2001, it plans to migrate to a COM-2, 0.16-µm CMOS process.

In this SiGe scheme, high-energy implantation (HEI) is used to form the subcollector region. This method cuts costs since it eliminates the conventional epitaxial-growth step over the implanted buried-layer regions. Moreover, the graded-base SiGe in this SSA implementation is selectively grown in an Si3N4-masked window using a commercially available reactor.

Designers can add critical features, such as the SSA structure for a lower base resistance, SiGe selective epitaxial growth for higher intrinsic transistor switching speed, and self-aligned collector implants for minimum parasitics. Cliff King, a member of the Bell Labs technical staff, says that doing so would give this SiGe technology the potential to greatly lower costs while reducing power dissipation by more than 50% or more for optical interface ICs with speeds beyond 10 Gbits/s.

The process also includes a modular high-Q inductor featuring Q factors of greater than 15. According to King, integrated high-Q inductors are critical to forming a complete 10-Gbit/s transceiver. By growing a heavily doped latch-up suppression buried layer on a 10-W/cm substrate to provide high Q inductors, the density and latch-up immunity needed for standard CMOS libraries is preserved.

Using the SiGe biCMOS process, Lucent intends to roll out devices like a transimpedance amplifier, clock synthesizers, multiplexers, demultiplexers, and clock and data regenerators by the second quarter.

For additional information, visit www.lucent.com.

TAGS: Digital ICs
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