Electronic Design
Obtain Nodal And Loop Analysis Equations By Inspection

Obtain Nodal And Loop Analysis Equations By Inspection

In a previous Idea for Design, Anshi Chen outlined a method for analyzing electrical circuits using Kirchhoff’s current law (KCL) in a novel way that allowed designers to simply write down the needed equations by inspection.1 This concept can also be extended to obtaining circuit solutions via loop equations using Kirchhoff’s voltage law (KVL).

These time-saving methods of obtaining equations by inspection are both extremely useful. With Chen’s method for using KCL, and with the circuit shown in Figure 1, the current law stipulates:

We can write the above equation as:

and rearrange it to:

But Equation 3 can also be obtained directly by inspection, bypassing all the algebra. Simply consider the left side of the equation to be the sum of all currents flowing away from Φ as if V1 and V2 were grounded and I were open (i.e., all neighbor sources set to zero). The right side of the equation is the sum of all currents flowing into Φ as if Φ were the ground reference point of the circuit (i.e., Φ set to zero).

The traditional approach to solving the circuit (according to most power systems textbooks) would be to first select one node as the reference node (for a circuit with N + 1 nodes), then define the voltages at the remaining nodes with respect to the reference node. The next step would be to transform each voltage source that is in series with an impedance into an equivalent current source in parallel with the admittance corresponding to that impedance.

Following this traditional approach we can redraw Figure 1 as Figure 2 and apply Kirchhoff’s current law. We also use the fact that admittance multiplied by voltage provides current. As a result we can write the equation for the circuit of Figure 2 as:

Using the relation for two resistors in parallel:

we can see that Equation 4 is algebraically equivalent to Equation 3. Thus by using the traditional approach, we reach the same result as we did using Chen’s method, but needed some extra steps to arrive at the relevant equation.

The shortcut method is much faster for writing down the equations. But for a circuit with many nodes, you may still want to use the traditional methods so you can use a computer. Many standard computer programs exist to formulate the nodal equations from the redrawn schematic and then to solve the corresponding simultaneous linear equations.

As an alternative to nodal analysis, however, you may want to use loop analysis. Chen’s method of using KCL to write down nodal equations by inspection is also adaptable to loop analysis using KVL. For the circuit given in Figure 1 and using the loop current directions given as in the figure, KVL leads to:

and:

Because there is only one loop through the current source:

I2 = –I

Rearrange Equation 5 to obtain:

But notice that Equation 8 can also be obtained by inspection. Recall that according to KVL, the algebraic sum of all the voltages around any closed path in a circuit equals zero. As a result, the sum of the voltages around a closed path in a clockwise manner must be equal to the sum of the voltages around a closed path in a counter-clockwise manner.

The left side of Equation 8 signifies voltages summed around the clockwise loop as if V1 and V2 were shorted and currents other than I1 were zero. The right side of the equation represents voltages summed around the counterclockwise loop as if current I1 were zero.

You then can follow the generic procedure for obtaining loop equations by inspection. First, for convenience, draw all loop currents in a clockwise manner. Then, for each individual loop:

1. Sum the voltages around the loop in a clockwise manner. Short (set to zero) all voltage sources touched by this particular loop and set all currents other than this particular loop current to zero.
2. Sum the voltages around the same loop used in Step 1 in a counterclockwise manner considering only the particular loop current from Step 1 to be zero. \\[Note that voltages are not shorted for this step.\\]
3. Set the equation obtained from Step 1 equal to the equation obtained from Step 2.

Continuing to use this inspection method for every independent loop will yield the number of equations needed to solve the circuit. Thus, a shortcut procedure exists for loop analysis, and it is possible to write down relevant equations by inspection.

To further illustrate this technique, consider the circuit of Figure 3. Because there is only one loop current I3 through the current source I, it follows:

I3 = I

Use the shortcut procedure for loop analysis to obtain two more equations in terms of loop currents by inspection of the circuit:

Note that the left side of Equation 10 is the sum of the voltages around the closed loop in a clockwise manner considering other currents I2 and I3 to be zero. The right side of the equation is the sum of the voltages around the closed loop in a counter-clockwise manner considering current I1 to be zero. Similarly:

The left side of Equation 11 is the voltage summed around the loop clockwise as if V1 and V2 were shorted and currents other than I2 were zero. The right side of the equation represents voltages summed around the loop counterclockwise as if current I2 were zero.

Shortcut methods, then, are applicable for both Kirchhoff’s current and voltage laws. They allow you to obtain relevant nodal or loop equations by inspection, simplifying the design/calculation process.

Reference
1. Anshi Chen, “New Way to Use Kirchhoff’s Current Law Simplifies Circuit Analysis,” Electronic Design, p. 63-64, May 22, 2008; http://electronicdesign.com/article/power/simplifying%20kirchhoff-s-current-law-analyses.aspx

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