Throughout my engineering career, I have benefited greatly by being able to derive circuit network equations symbolically. In other words, my analysis yielded a symbolic expression for the gain or transfer function, rather than a number, a table of numbers, or a plot. For example, the result may have been
Vout = Is*R1*R2/(R3+R4)
Vout = 4.6235 volts
By knowing the symbolic transfer function, designers can better understand the workings of the circuit and can be more inventive in developing needed performance enhancements. Developing the symbolic transfer function in the systematic way described here can simplify the process and will more likely lead to correct answers.
Many articles in print and on the web illustrate the nodal method for writing circuit network equations. In this article, I suggest a systematic method for performing nodal analysis, along with a few variations to simplify certain cases. For small circuits, the method may seem more complicated than straightforward algebraic manipulation, but for larger circuits it is systematic, easier and less prone to errors.
Let’s start with a simple circuit to illustrate the method.
Consider Figure 1.
1. This is a simple circuit to illustrate nodal analysis.
Various methods can be used to find that the output voltage Vout is:
Vout = VS * \\[R2 / (RS + R1 + R2)\\] (1)
Now let’s derive this same expression using the systematic approach to nodal analysis.
In nodal analysis, you simply write an equation for each node that says the sum of all the currents into a node must be zero (Kirchhoff’s current law). For this reason, we’ll first look at the input signals as current sources. Later we will analyze the circuit using the voltage source. For now, let us simply convert the voltage source to a current source using the Norton1 equivalent circuit as shown in Figure 2:
2. This circuit uses the Norton equivalent circuit for the source to simplify analysis.
STEP 1: Label each node, consecutively, with indexed voltage labels as shown in Figure 3:
3. This circuit shows labeled nodes.
STEP 2: I suggest that the algebra will be easier with nodal analysis if the resistive elements are given as conductances rather than resistances. Thus, for each resistor, we will substitute the designator G instead of R, where G = 1/R as shown in Figure 4:
4. In this circuit, resistor labels have been changed to conductance labels.
(Note: GS=1/RS; G1=1/R1; G2=1/R2)
STEP 3: Create an (n+1) by (n+1) table, where n is the total number of nodes. Fill in the top row with the node voltage designators (V1, V2 … ), followed by “Sources” for the last cell. Also put a label to the left of the remaining rows in order, V1, V2, etc. as shown below:
STEP 4: Place the sum of all elements connected to a node in the box under that node heading, and in the row with that node label.
For our example follow steps a through c below:
a) In row V1, under column V1, place the sum of all the elements connected to node V1 in your circuit (refer to Fig. 4).
b) In row V2, under column V2, place the sum of all the elements connected to node V2 in your circuit (refer to Fig. 4).
c) Continue with all the nodes, until there are entries in each box down a diagonal, one for each row Vi and column Vi (where i=1,2…n) as shown below:
STEP 5: For the remaining boxes (except those in the Sources column), where the row is Vi and the column is Vj, form the sum of all the elements connected between node Vi and node Vj. Place the negative of that sum in the box for row Vi and column Vj, as shown below (If there are no elements between Vi and Vj place zero in the box):
STEP 6: Now for each node, Vi, place the value of any current source that flows into that node in the box under Sources that goes with row Vi. If there is more than one source for that node, use the sum of the sources. If none, place zero as shown below:
The table derived in Step 6 represents the Kirchhoff current laws for each node. That is, “The sum of the currents into each node is equal to zero.” The interpretation of the table is this:
a) For each Vi row, multiply the quantity in the box by the voltage at the top.
b) For each Vi row, add the values obtained in a).
c) Set the result equal to the Source value on the right for that row.
Thus we get:
For the V1 row: (GS+G1)*V1 + (-G1)*V2 = VS*GS (2)
For the V2 row: (-G1)*V1 + (G1+G2)*V2 = 0 (3)
These are the equations we get by setting the total currents to zero for each node.
STEP 7: We can consider the previous table to represent the matrix equation:
To obtain a solution for Vout (which is V2), we solve the matrix equations. This is done by dividing the values of two determinants. The numerator determinant is formed by replacing the V2 column in the first matrix with the Source values as follows:
The denominator determinant is just that of the matrix itself:
The result for a 2x2 determinant is:
= ad – bc
Thus, the solution for Vout is:
Vout = V2 = \\[(GS+G1)*0 – (-G1)*(VS*GS)\\] / \\[(GS+G1)*(G1+G2) – (-G1)*(-G1)\\] (4)
Equation (4) simplifies to:
Vout = G1*GS*VS / \\[GS*(G1+G2) + G1*G2\\] (5)
Now if we multiply numerator and denominator by R1*R2*RS, and note that R*G = 1, we get:
Vout = R2*VS / \\[R1 + R2 + RS\\] (6)
This is the same as equation (1).
Now, what about voltage sources? Let’s go back to the circuit of Figure 1.
1. (repeated) This is a simple circuit to illustrate nodal analysis.
STEPS 1&2: Number the nodes and change to conductances as shown in Figure 5:
5. This is the Fig. 1 nodal analysis circuit with conductance labels and a voltage source.
STEP 3: Set up the matrix table as shown below:
STEPS 4,5&6: Place elements in matrix boxes.
Now we have a problem: rows V2 and V3 are OK, but what do we do with row V1? We can’t sum the currents because we have no idea what the current is from VS.
The solution is to write the equation V1 = VS. In other words, put a “1” in the box under V1, a zero in the boxes under V2 and V3, and put VS in the Sources box. Hence:
Whenever there is a voltage source from some node to ground, simply fill in the table for that node with the equivalent to the equation Vx = Vs. So put a “1” in the box under Vx, Vs in the box under Sources, and zeros in the other boxes in that row.
Completing the boxes, we have the following table:
STEP 7: Calculate the solution
Now we need the determinant for a 3X3 matrix. Given the matrix:
The determinant is:
= a(ei-fh) - b(di-fg) + c(dh-eg)
Therefore the numerator determinant is:
and the denominator determinant is:
= (GS+G1)*(G1+G2) - (-G1)*(-G1) = GS*(G1+G2) + G1*G2
Dividing numerator determinant by denominator determinant gives us the same result as equation 5:
Vout = G1*G2*VS / \\[GS*(G1+G2) + G1*G2\\] (5) repeated
Op Amp Example
Suppose we have a circuit with an ideal op amp (infinite gain and bandwidth). This can be represented quite nicely with the methods seen so far. Consider the circuit of Fig. 6:
6. This nodal analysis circuit is for an ideal op amp.
Following steps 1 through 3 of our procedure, we get Figure 7:
7. The circuit of Figure 6 with resistances changed to conductances.
Attempting to follow steps 4 through 6 we get the table shown below:
What do we do with node V3? Here we don’t know the output current from the op amp, so we can’t write an equation to balance the currents.
Here is the trick: Note that for an ideal op amp (infinite gain), the output will always go wherever it needs to so that the plus input will equal the minus input. In other words, the op amp will not let the input nodes differ from each other. If they did differ, the output would go to infinity because the gain is infinite. So all we need to do for row V3 is write the equation V1 = V2!
STEP 7: The solution:
= -(-G1)*(-1) = -G1
Hence the solution is:
Vout = VS*(G1+G2)/G1 (7)
Or, when multiplying top and bottom by R1*R2:
Vout = VS*(R1+R2)/R2 (8)
which we know to be correct.
Non-ideal Op Amp
For a non-ideal op amp, let’s assume a finite gain, A. Consider Figure 7 again, with finite gain specified as shown in Figure 8:
8. The circuit of Figure 7 with finite gain specified as A.
The op amp output V3 is:
V3 = A*(V1-V2) or A*V1 – A*V2 – V3 = 0
So that’s exactly what we put in our table for line V3:
STEP 7: Solution:
= -A*G1 - (G1+G2)
Vout = VS*\\[-A*(G1+G2)\\] / \\[-A*G1 - (G1+G2)\\]
= VS*\\[A*(G1+G2)\\] / \\[A*G1 + (G1+G2)\\]
Since A is usually large, we may wish to divide top and bottom by A to get:
Vout = VS*(G1+G2) / \\[G1 + (G1+G2)/A\\] (9)
Written in this way equation 9 shows that the second term in the denominator will disappear when A is infinite.
Multiplying top and bottom by R1*R2:
Vout = VS*(R1+R2) / \\[R2 + (R1+R2)/A\\] (10)
With some algebra, this result can be put in a more familiar feedback form:
Vout = G/(1+G/A) where G = (R1+R2)/R2 (11)
Using these techniques, one can obtain the symbolic solution for many kinds of circuits. In future articles, we will cover methods for solving larger determinants, while getting the right answer, and methods of checking the answers to be sure they are correct.
Note 1: For an explanation refer to “Norton’s Theorem”, Wikipedia.