Electronic Design

Single-Chip Analog Front End Launches ADSL2+ Modems

With the global boom in DSL broadband services, highlighted by a 41% spike in the U.S. alone last year, carriers are looking to boost DSL speeds to compete with cable companies. Current ADSL rates top out at about 1.5 Mbits/s, suiting them for Internet access.

Newer ADSL2 and ADSL2+ standards handle much higher speeds, making video and VoIP practical. With Silicon Laboratories' Si3110 analog front-end (AFE) chip, along with DMT (discrete multitone) cores from suppliers like Aware, designers can create a low-cost ADSL2+ modem that can hit 24-Mbit/s data rates on the twisted-pair local loop at distances to 5000 feet.

Download rates drop rapidly with longer lines, but a rate of 8 Mbits/s is possible at a distance of 8000 feet with ADSL2+. Using this capability, carriers can hold off on more expensive passive optical networks (PONs) yet still take advantage of new broadband opportunities through existing networks.

The Si3110 AFE is a full-blown update of the Si3101 ADSL AFE. The new chip incorporates all of the essential circuits except for the line transformer and a handful of discrete components, such as bypass capacitors and the crystal. It supports the ITU G.992.5 ADSL2+ standard (including Annexes A, B, and C), as well as the DSL Forum's TR-48 and WT-085 recommendations for interoperability and testability.

It's made with standard CMOS. The chip incorporates a 14-bit digital-to-analog converter, a 14-bit sigma-delta analog-to-digital converter, a voltage-controlled crystal oscillator, a line driver amplifier, a programmable DSL hybrid, a programmable gain amplifier in the receive path, precision analog filters, and the high-speed digital interface to the DSP chip implementing DMT (see the figure).

The patented architecture's unique programmable DSL hybrid enhances echo cancellation and improves noise reduction in the receive path, resulting in higher data rates on longer lines. An adaptive hybrid filter technology lets modem manufacturers easily overcome problems associated with the performance degradation caused by bridge taps on the twisted-pair line.

The Si3110 operates from a 5-V analog supply and 3.3-V digital dc supplies, eliminating the costly 12-V supply in older units. An external line transformer boosts the line driver output to the desired 14 V p-p level. With this low power consumption, the device can be powered from a USB port. As a result, the power supply can be eliminated altogether in some designs. Power consumption weighs in right at 1 W.

The chip comes in a 44-pin TQFP housing that's fully pin-compatible with the previous Si3101 chip. Pricing is $5.27 in 10,000-unit lots. Samples are available now, with volume production slated for the third quarter. An evaluation board (Si3110-EVB) costs $150.

Silicon Laboratories
www.silabs.com

Aware
www.aware.com

DSL Forum
www.dslforum.org

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