Electronic Design

Triple 8-Bit ADC Blends Digital TV And PC Graphics Together

The THS8083 triple 8-bit analog-to-digital converter (ADC) was designed to accept analog-component TV or PC-graphics input signals. Consequently, this software-programmable video digitizer can handle a PC's RGB or a digital TV's (DTV's) YPBPR video-signal format over the same interface.

"The high integration and flexibility afforded by the THS8083 will enable manufacturers to bring PC-TV convergence products to market faster," states Tom Lahutsky, new products development manager for Texas Instruments' Data Converter Group. Based on 3-V 0.6-µm CMOS process, the THS8083 includes three 8-bit pipelined ADCs, programmable-gain amplifiers (PGAs), and programmable video clamps; a phase-locked loop (PLL); a data-output formatter; and an I2C interface. The clamp circuits and PGAs provide brightness and contrast control. The configurable clamp allows the device to accept an ac-coupled video signal in either an RGB or a YPBPR format. With the PGA, it is possible to scale input video signals from 0.4 to 1.2 Vp-p. The company says the ability to clamp YPBPR/YUV signals for DTVs and RGB signals for PCs is unprecedented.

The integrated output formatter can support single- and double-pixel-width bus formats as well. It also can generate a 4-2-2 sampled ITU-BT656-style output format, popular in DTV applications. In addition, the THS8083 implements a sync stripper to accept sync signals embedded in Y or luminance, synch-on-Y signals.

Use of an on-board digital PLL accounts for the converter's enhanced flexibility. This digital PLL provides three programmable-clock outputs, including a programmable-loop filter. Optimizing the loop response to the line frequency of each video-format input is important. Doing so enables the loop filter to minimize the degrading impact of horizontal sync frequencies. Such frequencies can vary from 15 to more than 100 kHz. Additionally, the digital PLL can operate in the open-loop configuration as a precise frequency synthesizer. The THS8083 reduces the load on the microprocessor. It offers real-time readouts of incoming horizontal and vertical sync and pixel- clock frequencies over the serial interface.

For high-quality video, the converter offers a signal-to-noise ratio (SNR) of 42 dB. The differential nonlinearity is ±1.0 LSB and the integral nonlinearity is ±1.5 LSB at an 80-Msample/s rate. Packaged in a 100-pin TQFP, the THS8083 consumes 1 W maximum at a 3.3 V-supply. It comes in two versions. The 80-Msample/s device is aimed at XGA applications requiring 75-Hz screen refresh rates. The higher-speed model achieves a 95 Msample/s rate.

In 1000-piece quantities, the 8-bit 80-Msample/s version costs $12 each.

Texas Instruments Inc., Semiconductor Group, Literature Response Center, P.O. Box 954, Santa Clara, CA 91380; (800) 477-8924, ext., 4500; www.ti.com.

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