Electronic Design
2009's Mixed-Signal ICs Offer Low Power And High Performance

2009's Mixed-Signal ICs Offer Low Power And High Performance

So what have mixed-signal chipmakers been doing as the industry climbs out of the recession? Just look at the product announcements over the past year, and you’ll discover where companies have been investing their non-recurring engineering dollars, as well as features and specifications representing the state of the art.

MAXIMIZING CHOICES
In industrial applications, chipmakers have been leveraging their design platforms to produce large families of data converters that offer a range of price points and combinations of features. For example, in October, Analog Devices announced 26 new, lowpower, high-speed analog-to-digital converters (ADCs).

The chips all have similar properties, but the company says they include three industry firsts for 16-bit ADCs. First, the 16-bit, 80-Msample/s dual-device AD9269 provides quadrature-error correction (QEC). Second, the AD9266 single-channel, 16-bit converter can be clocked from 80 to 125 Msample/s. Third, Analog Devices says its AD9265 is the smallest-footprint, singlechannel, 16-bit ADC spanning 20 to 80 Msamples/s.

The other 23 single-channel, low-power ADCs expand the company’s 2009 low-power data converter portfolio to 44 different part numbers. Low power is a common theme across all of these parts. Analog Devices says some parts in the latest batch use up to 87% less power than equivalent ADCs already on the market.

The AD9269’s QEC is a term that probably isn’t in every designer’s vocabulary. The chip is intended for I/Q downconversion, and its QEC and dc-offset digital processing blocks adaptively match the amplitude and phase of the I and Q paths for maximum image suppression while correcting dc offset of the I and Q paths.

Seeking the current small-footprint record, the single-channel AD9266 compresses the basic 20- to 80-Msample/s data converter, a sample-and-hold, a voltage reference, a programmable clock, data alignment circuitry, and programmable digital test patterns into a 5- by 5-mm package. Besides the built-in deterministic and pseudorandom test patterns, user-defined test patterns can be entered via the serial programmable interface.

Similarly seeking economies of scale by leveraging common design elements, in July, Linear Technology unveiled a family of 24 ultra-low-power 14- and 12-bit, quad and dual ADCs for applications including wireless, portable medical imaging, and non-destructive testers.

The ADCs operate up to 125 Msamples/s, and Linear says they dissipate as little as one-third the power of competing chips. The flagship product is the quad, 14-bit, 125-Msample/s LTC2175- 14, which dissipates only 558 mW (140 mW per channel). Signal- to-noise ratio (SNR) is spec’d at 73.4 dB, and spurious free dynamic range (SFDR) is 88 dB at baseband.

Options on the different chips in the family include a data output randomizer that reduces digital feedback, seven programmable lowvoltage differential signal (LVDS) output current levels, internal 100-O output termination resistors, and digital-output test patterns.

New releases from Maxim Integrated Products also included the launch of large ADC families. In November, the company announced 18 multi-channel converters with internal references. These devices were designed to give engineers working on automotive designs, portable/battery-powered electronics, solar-powered systems, and system-monitoring applications a high degree of flexibility in selecting resolution, channel count (4/8/12), supply voltage (2.7 to 3.6 V/4.5 to 5.5 V), and reference voltage (2.048 V/4.096 V).

Designated the MAX11600 through MAX11617, the ADCs are available in 8-bit, 188-ksample/s versions (MAX11600-05) and 10- and 12-bit, 94.4-ksample/s versions (MAX11606-17). All 18 are software configurable to support either unipolar or bipolar inputs, as well as single-ended or differential operation. Pin compatibility between many of the devices enables designers to change resolution and channel count without redesigning their board or control software.

Like competing chipmakers, Maxim emphasized low power consumption—down to 350 µA at 188 ksamples/s or 8 µA at 10 ksamples/s or less, with automatic shutdown technology that powers down the ADCs between conversions.

TINY PACKAGES, LOW POWER
For low-frequency portable temperature and pressure sensors, compact systems, or power-supply monitoring, Linear’s LTC2463 offers a small footprint. (Earlier, Linear introduced the LTC2460, LTC2462, LTC2450, and LTC2452 variants.)

This 16-bit, delta-sigma ADC with integral precision voltage reference (10 ppm/°C maximum; 2 ppm/°C typical) and oscillator comes in either a 12-lead, 3- by 3-mm dual flat no-lead (DFN) package or a 4- by 5-mm mini small-outline package (MSOP). It communicates via a two-wire I2C interface and operates from a single 2.7- to 5.5-V supply. It will digitize a ±1.25-V differential input range at output rates up to 60 Hz.

Typical 16-bit dc performance specs include 1-LSB (least significant bit) integral nonlinearity, 2.2-µVRMS transition noise, and 0.01% gain error. It draws 2.5 mA (maximum) at its 60-Hz maximum sample rate with the internal reference active. After each conversion, the ADC enters “nap” mode, reducing supply current. A proprietary input sampling network reduces dynamic input current to less than 50 nA.

In October, Texas Instruments introduced three 730-ksample/s simultaneous-sampling, successive approximation register (SAR) ADCs with high-voltage inputs for applications including multiaxis motor control, simultaneous data acquisition, robotics, power- quality management, and power protection. The ADS8556, ADS8557, and ADS8558 (16, 14, and 12 bits, respectively) feature typical SNRs up to 91.5 dB (on the 16-bit ADS8556).

TI says the ADS8556 is the industry’s only simultaneous sampling ADC that offers true, 16-bit performance with no missing codes and that its SNR is 3.5 times better that the previous best 16-bit converter in its class. As low power was a key performance metric across the year for ADCs, the trend continues for these chips. The ADS8556 specifies 298.5-mW power dissipation at maximum data rate and 150 mW at 250 ksamples/s.

Turning from SAR to pipeline ADC architectures, TI’s 12-bit, 550-Msample/s ADS54R463 ADC provides more than 200 MHz of signal bandwidth for applications that require high resolution, accuracy, and linearity. The device offers the highest SFDR and SNR available for high intermediate frequencies. For example, at 500 Msamples/s, it boasts 64.1-dBFS SNR and 80-dBc SFDR at 450 MHz and 62.5-dBFS SNR and 70-dBc SFDR at 900 MHz, enabling more efficient power-amplifier linearization in digital pre-distortion (DPD) solutions.

For automated test equipment (ATE), medical imaging, scientific instrumentation, and test and measurement, TI’s ADS1675 24-bit delta-sigma ADC runs at 4 Msamples/s and combines top bandwidth, ac and dc performance, and a dual-path digital filter. A low-latency filter path provides 24-bit settling as fast as 2.65 µs.

The chip offers 103-dB dynamic range at 4 Msamples/s, 111-dB dynamic range at 125 ksamples/s, and –107 dB of total harmonic distortion. Its dc specs include 3-ppm integral nonlinearity (INL), 4-µV/°C offset drift, and 4-ppm/°C gain drift. A user-selectable dual-path digital filter facilitates tradeoffs between bandwidth and latency.

ADCS WITH SPECIAL FEATURES
Another trend in ADCs for the industrial-applications arena is the addition of unique features to simplify system design. For example, Maxim’s MAX11040 four-channel, 24-bit simultaneoussampling ADC can be connected in cascade to provide up to 32 channels, using a unique SPI/ queued SPI (QSPI)/Microwire interface by means of which all eight devices can be accessed using only a single chip-select input (Fig. 1).

The host processor’s control logic remains the same regardless of the number of channels. The chip’s 0- to 333-µs programmable delay provides compensation for phase shifts caused by various resistor dividers, transformers, or filters at the analog inputs. Guaranteed minimum ac specs are 90-dB signal, noise and distortion (SINAD) and 91-dB SFDR. Simultaneous sampling rates can be set between 0.25 and 64 ksamples/s.

Emphasizing low-power consumption and minimal external components in portable applications such as ultrasound and medical imaging, portable instrumentation, and lowpower data-acquisition systems, Maxim’s dual-channel, 8-bit, 65/100/130-Msample/s ADCs consume 43 mW (MAX19505), 57 mW (MAX19506), and 74 mW (MAX19507) of analog power per channel. Dynamic specs include 49.8-dBFS SNR and 69-dBc SFDR at 70 MHz.

To reduce external component count, the ADCs include a selfsensing, analog supply regulator that allows the use of 1.8-, 2.5-, or 3.3-V analog supplies with no external regulator. Also, clocks can be either single-ended or differential, so clock-signal conversion isn’t needed. Analog inputs sport a 0.4- to 1.4-V input common-mode range to support ac-coupled or dc-coupled inputs without an external ac-coupling capacitor. An on-board clock divider eliminates the need for an external divider. Finally, integrated CMOS output-termination resistors make external damping resistors unnecessary.

Special features and high performance aren’t limited to industrial applications. For wide-bandwidth receivers and digitizers, the Texas Instruments ADS5400 ADC, announced in October, combines 12 bits of resolution with a 1-Gsample/s sampling rate, effectively doubling the amount of signal bandwidth that can be captured in a single ADC. Input bandwidth is 2.1 GHz (Fig. 2).

In the first Nyquist zone, SNR is 59 dBFS and SFDR is 75 dBc. For intermediate frequencies beyond 1 GHz, SNR is 58 dBFS and SFDR is 70 dBc. A fully buffered analog input presents a high impedance to a signal source and isolates the onboard sampleand- hold’s internal switching. The devices are fabbed in complementary bipolar silicon germanium (SiGe) on TI’s BiCom3 silicon-on-insulator process technology.

In August, National Semiconductor introduced a dual-channel, 16-bit, 160-Msample/s pipeline ADC in a 10- by 10-mm footprint, the ADC16DV160, for new wireless basestations. It emphasizes low power (650 mW per channel), high input-bandwidth (1.4 GHz), and impressive dynamic performance at high input frequencies (91.2-dBFS SFDR, 76.3-dBFS SNR, and 97.3-dBFS higher-order harmonic distortion at 197 MHz).

MEDICAL APPLICATIONS
The medical application subset of the industrial market for mixed-signal chips continues to garner a lot of attention. To help make computed tomography (CT) scanners a little more affordable for hospitals, Analog Devices introduced the ADAS1128 24-bit current-to-digital converter for digitizing photodiode-array signals into digital signals (Fig. 3).

The device provides 128 data conversion channels (four times the previous highest density) in a package that measures one square centimeter and ups the ante on conversion rate from 6 to 20 ksamples/s. Squeezing more channels into the scanner improves resolution. Higher conversion rates mean better real-time imaging, and fewer components mean a less expensive device that also uses less power.

Also focusing on ultrasound imaging, the Analog Devices AD9276 and AD9277 third-generation octal ultrasound receivers integrate gain, filtering, data conversion, and demodulation for continuous wave (CW) Doppler signal processing on a single chip. They are designed for CW in addition to the more common pulse wave (PW) Doppler ultrasound. The availability of both modes offers advantages in measuring faster blood-flow rates.

The AD9276 combines an eight-channel variable-gain amplifier (VGA) with a low-noise preamplifier (LNA), anti-aliasing filters, and a 12-bit, 80-Msample/s ADC. The AD9277 incorporates a 14-bit, 50-Msample/s ADC but is otherwise the same. Specs include 0.75 nV/vHz at 5-MHz (typical) input-referred noise. Typical output dynamic range exceeds 160 dB/vHz.

The AD9276 and AD9277 octal ultrasound receivers consume only 90 mW per channel when processing signals in CW Doppler mode and require 80% less board space than alternative ultrasound receiver subsystems. Also, both feature up to 42-dB variable gain and a selection of anti-aliasing filter options. They integrate an I/Q demodulator with programmable phase rotation on each channel as well.

For battery monitoring, portable instrumentation, industrial process control, smart transmitters, and medical instrumentation, TI’s ADS1115 16-bit ADCs in 2.0- by 1.5-mm leadless QFN packaging provide a small footprint along with product options for scalable integration that can reduce component count and simplify design. They perform conversions at programmable data rates up to 860 samples/s, typically consuming just 150 µA and operating down to 2 V (Fig. 4).

The ADS1115 also integrates an oscillator, low-drift voltage reference, programmable gain amplifier, comparator, and fourchannel input multiplexer. Other family members have lower resolutions and strip out features to scale features on a common platform or to lower the price.

AMPS AND ANALOG FRONT ENDS
ADCs are only part of the mixed-signal story. Before an analog signal can be digitized, it must be amplified and conditioned. Optimized for operation from 1 to 500 MHz, the specs for Linear Technology’s LTC6412, an 800-MHz analog-controlled VGA, emphasize noise and distortion performance, gain conformance, and gain flatness, making it a top choice for use in automatic gain control (AGC) in receiver IF chains.

The device’s gain control is highly linear, with a guaranteed maximum conformance error of only 0.45 dB. The VGA provides continuous gain adjustment from –14 to +17 dB. Emphasizing low harmonic distortion and noise flatness, its third-order output intercept point (OIP3) is 35 dBm at 240 MHz across all gain settings. Its output noise level is constant over the entire gain range, with a 10-dB noise figure (NF) at maximum gain. This results in a constant SFDR, greater than 120 dB at 240 MHz over the full gain-control range.

For versatility, the device’s gain may be controlled with either a positive or negative slope control voltage. Using negative gain slope mode, the gain control slope is approximately –32 dB/V at 140 MHz, with a control range of 0.1 to 1.1 V. Power consumption is 110 mA with a 3.3-V supply.

For driving high-resolution ADCs, Linear created the LTC6416 to optimize noise figure (1.8 nV/vHz output-referred noise) and distortion performance at high frequencies. Even above 300 MHz, it maintains –72.5 dBc of third-order intermodulation distortion and –74-/–67.5-dBc second- and third-harmonic distortion.

The LTC6416 has programmable output voltage clamps to limit the maximum voltage levels applied to the ADC inputs, ensuring that there is no problem with ADC overdrive recovery. The buffer can be used with a transformer at its input to achieve additional low-noise system gain in high-bandwidth applications.

Emphasizing precision, low noise, and a small footprint for portable medical devices and industrial applications, Maxim’s MAX9617 and MAX9618 zero-drift, rail-to-rail operational amplifiers are fabbed on a proprietary biCMOS process technology. As an example of target applications, Maxim points to electrocardiographs, where analog front ends must isolate signals on the order of 0.1 to 6 mV from an electrically noisy environment.

Practically, this boils down to a signal in the 0.05- to 150-Hz range with a 300-mV dc offset component and a 1.5-V common- mode component. This calls for amplifiers with a very high common-mode rejection ratio; ultra-low input-offset voltage, bias current, and input-voltage noise; and minimal 1/f noise. A patentpending auto-zero technique makes it possible to meet those specs while minimizing power consumption and footprint. Specifically, that means a 10-µV (maximum) input-offset voltage and 1-µV p-p input-voltage noise from 0.1 to 10 Hz. Typical input offset voltage drift is 5 nV/°C.

For portable equipment such as wireless remote sensors, powerline monitoring, and micropower oxygen and gas sensors, National Semiconductor used its biCMOS process technology to craft a nanopower operational amplifier, the LPV521, that consumes only 552 nW, with guaranteed operation down to 1.6 V. (Guaranteed maximum supply current is 0.4 µA.)

Its wide-input common-mode voltage range accepts input signals 100 mV beyond each power-supply rail, enabling direct connection to many sensor types. In addition, maximum input offset voltage is 1 mV, with 3.5-µV/°C drift. Uniquely, integral electromagnetic interference suppression filters reduce unwanted interference from wireless devices such as cell phones, motion sensors, and RFID readers.

Complete analog front ends, Maxim’s MAX15500 and MAX15501 industrial analog-output signal conditioners are intended for applications such as programmable logic controllers (PLCs). They integrate a programmable voltage-output amplifier and a current-output amplifier, with bipolar/unipolar (±10-V) and 4- to 20-mA current outputs operating directly from a 24-V field supply. Built-in are ±35-V circuit protection, error reporting, and daisy-chain flexibility. Designers can employ a single device for channel-isolated applications or multiple devices for groupisolated applications.

Maxim also says that unlike signal conditioners that need precision- matched resistors to track voltages consistently over temperature, the new parts’ integrated voltage amplifier and voltageto- current converter mean no additional resistors are necessary. Only the current gain-setting resistor is external to the device.

If a fault occurs (open-circuit load in current mode, short-circuit load in voltage mode, over-temperature, and supply brownout), an open-drain fault-interrupt pin is pulled low. The status of the fault bits is available through an SPI. Fault monitoring is a point of differentiation for Maxim. The chip monitors more faults with fewer error flags than alternative devices, reducing pin count. Its flags can be latched as well, simplifying the interface to the system controller.

While most offerings for ultrasound systems are fabricated in silicon, Maxim’s MAX2036 and MAX2038 VGAs with on-board CW Doppler beamformers use SiGe. The fully integrated CW Doppler beamformer eliminates the need for external phase rotator ICs, delay lines, analog switches, and mixers. The MAX2036 is optimized for 10-bit ADCs, which require greater variable-gain range than 12-bit ADCs. The MAX2038 is for those 12-bit ADCs, where its higher dynamic range helps capitalize on the ADC’s inherent resolution.

Essentially, Maxim combined the linearity and noise performance of earlier VGAs with an on-chip, octal quadrature mixer array and programmable local-oscillator phase generators. For pulse mode, the VGA path is enabled and the mixer array is powered down. In CW mode, the quadrature mixer array is enabled while the VGA path is powered down. Also in CW mode, the LO phase dividers can be programmed to allow four, eight, or 16 quadrature phases for optimal beamforming resolution.

Thermal and jitter noise specs are –155 dBc/Hz at 1-kHz offset from a 900-mV p-p, 1.25-MHz carrier signal. This is useful in dealing with signal clutter, which can be as high as 200 mV p-p, degrading the receiver’s ability to accurately detect Doppler signals near the CW carrier signal. The new VGAs are intended for use with Maxim’s MAX2034 quad LNA. The combination delivers a cascaded output-referred noise of only 20 nV/vHz.

To provide an easy-to-use, low-power front-end solution for temperature or flow/pressure measurement or for general industrial process control, the 24-bit resolution, 2-ksample/s ADS1248 and ADS1247 ADCs from TI integrate dual matched current DACs, a low-drift internal reference, an oscillator, a temperature sensor, burnout detection, and eight general-purpose I/Os. They draw only 2.56 mW. The ADS1248 provides four differential or seven single-ended inputs, and the ADS1247 provides two differential or three single-ended inputs. Both also integrate a low-noise (40 nV at G = 128) programmable gain amplifier (PGA).

DACs AND CODECs
Analog Devices has announced a dual-channel, 16-bit, 1.2-Gsample/s digital-to-analog converter (DAC) for advanced multi-carrier wireless and broadband communications equipment. The AD9122 is intended for multi-standard cellular basestations and other applications that use DPD. An integrated 32-bit numerically controlled oscillator enables flexible interface (IF) placement. Output-frequency flexibility is helpful in meeting four- to six-carrier GSM transmission specifications.

The DAC is intended to be used with ADI’s ADL5375 quadrature modulator and AD9516 14-output clock generator. In a signal chain, the combination meets or exceeds six multi-carrier GSM specifications for intermodulation distortion and SNR. Other complementary parts include the ADRF6702 quadrature modulator and ADRF6602 receiver mixer.

The dual device supports 600 Msamples/s per DAC for signal bandwidths up to 400 MHz. Operating with its on-chip phaselocked loop (PLL) at 150 MHz, the AD9122 exhibits a 76-dB adjacent-channel leakage ratio (ACLR) for single-carrier WCDMA. (With an external PLL, the AD9122 can achieve 83-dBc ACLR.) Integrated interpolation filters provide selectable factors of two, four, and eight.

From Linear Technology comes a DAC for the kind of multichannel open-loop and closed-loop systems typically found in communication systems, industrial process control, ATE, and programmable logic controllers. The LTC2656 is a 16-bit, octal DAC with integrated voltage reference that guarantees a maximum ±4-LSB INL over temperature, which Linear says is three times better than the nearest octal competitor.

With 0.1% gain error and ±2-mV offset error, the DAC remains accurate near the supply rails. A precision reference achieves a 10-ppm/°C (2 ppm/°C, “typical”) temperature coefficient. Operating from a single 2.7- to 5.5-V power source, supply current is 375 µA per DAC with the reference activated. In terms of ac performance, settling time is 8.5 µs for a half-scale step and crosstalk is less than 1 nV-s.

The LTC2656 lets designers choose between 16-bit or 12-bit resolution and either an external voltage reference or an internal 1.25- or 2.048-V reference. (All specs for the LTC2656 are datasheet maxima or minima.)

Turning to audio applications, Maxim’s low-power MAX9867 stereo audio coder/decoder (codec) integrates digital microphone support and programmable digital filters in wafer-scale packaging to deliver a complete voice record path with stereo differential microphone inputs and stereo single-ended line inputs.

That support for both traditional analog microphones and digital microphones enables engineers to future-proof their designs. During both recording and playback, the programmable digital filters provide a simple method for eliminating system noise (e.g., the 217-Hz GSM packet frequency) from the audio path. They also allow custom noise-cancellation schemes for isolating certain vocal frequencies. Further, simple but effective click-and-pop elimination does not require large capacitors. Power consumption is 6.7 mW during stereo audio playback.

Maxim’s I²C-controlled, DS4432 dual-channel, 7-bit, sink/ source current DAC is designed for power-supply margin testing and adjustment. It is useful for servers, routers, switches, video processing cards, and other dc-dc power-supply applications requiring system-level voltage control, calibration, and margin testing.

Each output channel provides fine control of a dc-dc power supply by sinking or sourcing current directly into the power supply’s feedback node. The DAC offers lower full-scale current and higher resolution than legacy sink/source current DACs, expanding the range of existing dc-dc power supplies with margining or adjustment capabilities.

Turning to industrial control, Maxim’s pin- and software-compatible 16-bit MAX5138 and 12-bit MAX5139 precision DACs, in 3- by 3-mm packaging, integrate a high-precision voltage reference and provide high linearity. Their integrated voltage reference has a 10-ppm/°C temperature coefficient. An internal buffer provides load regulation and transition-glitch suppression on the DAC output.

For applications that drive valves or other transducers that need to be off during power-up, a pin-programmable, zero/midscale output ensures that the output powers up to the desired state, even during a loss-of-power event. To reduce the number of optocouplers in isolated applications, the serial interface features a READY output for easy daisy-chaining of multiple devices.

The Texas Instruments 16-bit DAC8734 four-channel, highvoltage chip emphasizes low drift, wide operating temperature range, high initial accuracy, and a 6- by 6-mm footprint for application in high channel-count ATE and medical equipment. It’s part of a new family of high-performance, bipolar DACs in pincompatible 12- and 14-bit versions.

Drift is specified as 2 ppm over 500 hours and 3 ppm over 1000 hours. Guaranteed maximum INL at 16-bit resolution is ±1 LSB, maximum (0.006% FSR), with a zero error of up to 1/8 LSB. That’s achieved by trimming during manufacturing to a maximum gain error of 4 LSB at 16 bits, with built-in user calibration that further reduces gain error down to that ±1 LSB. Its output range is programmable for two or four times the reference voltage for bipolar operation at ±2 to ±16 V.

Extending an existing family of 12-, 14-, and 16-bit DACs for data acquisition systems, industrial process control, and portable instrumentation, TI introduced the 16-bit DAC8568, the 14-bit DAC8168, and the 12-bit DAC7568. These devices integrate eight precision channels, while providing high accuracy and low power consumption of 0.56 mW/channel (including internal reference current). Other key specs include 5-ppm/°C (maximum) temperature drift on the internal reference across the entire operating range, along with ±0.004% (typical) initial accuracy and 0.1-nV-s output-glitch energy.

UNUSUAL FEATURES
Designed for portable medical imaging and ultrasound, portable test and instrumentation, software-defined radios, and 3G/4G Long-Term Evolution (LTE) and WiMAX basestations, Linear’s low-power, 14-bit, 150-Msample/s LTC2262 ADC dissipates 149 mW. That’s less than one-third the power of competitive solutions, according to the company.

What’s unusual is that in addition to low power consumption, the LTC2262 integrates two unique features for reducing digital feedback where even good layout practice may fail. Such feedback occurs when energy from ADC outputs couples back into the analog section, causing interaction that appears as odd shaping in the noise floor and spurs in the ADC output spectrum.

The worst case is when the analog input is at midscale, and all outputs are changing from ones to zeroes, or vice versa, generating large ground currents that couple back into the input. To combat this, the LTC2262’s designers created a proprietary alternate bit polarity (ABP) mode that inverts all of the odd bits ahead of the output buffers.

This equalizes the number of ones and zeroes switching and effectively cancels the large ground-plane currents that contribute to digital feedback. In addition to the alternate bit polarity mode, an optional data output randomizer decorrelates the digital output, reducing the likelihood of repetitive code patterns.

Both digital feedback reduction techniques improve spurious free dynamic range (SFDR) by 10 to15 dB, Linear says. Actual SFDR is 88 dB at baseband, according to the datasheet. Other key specs include SNR of 72.8 dB and jitter of 0.17 psRMS. A 12-bit version is also available.

Finally, a veritable electronic Swiss Army knife, Maxim’s MAX1329 low-power data-acquisition system (DAS) integrates a 12/16-bit, 300-ksample/s ADC, dual 12-bit force-sense DACs, and voltage references. The 12-bit ADC’s natural 12-bit resolution can be extended to 16 bits using internal dithering and digital signal processing.

For sensor excitation, the device’s high-accuracy, internal 12-bit DACs exhibit ±8-LSB integral nonlinarity and ±1 differential nonlinearity, along with 10-µs (maximum) settling times. An intelligent microcontroller interface completes the kind of closedlooped system used in many battery-powered/portable devices and data-acquisition systems.

Other integral analog support blocks include operational amplifiers, a 16:1 input multiplexer, a 1-V/V to 8-V/V PGA, and lowleakage single-pole/double-throw (SPDT) and single-pole/singlethrow (SPST) solid-state switches. An integrated 3.6864-MHz oscillator provides a master clock source. Other support features include dual voltage monitors, internal and external temperature sensors, and user-programmable general-purpose I/Os that can be used to output system interrupts, control switches, and drive shutdown.

The MAX1329 operates on digital supply voltages from +1.8 to +3.6 V and analog supplies from +2.7 to +5.5 V. An on-chip charge pump provides a +5-V supply up to 25 mA to power other circuitry. With all of the analog blocks enabled, the MAX1329 has a typical quiescent supply current of 3.75 mA. This drops to 0.5 µA in shutdown mode.

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