From Algorithms To HDTVs

FPGAs are steadily finding their way into volume consumer applications. Here, complex algorithms play a key role.

One shining example is high-definition television (HDTV): ?Video processing in HDTV applications is ripe for parallelization,? says Jeff Jussel, Celoxica's vice president of marketing.

Not only that, but the algorithms used for video processing are fluid. Both of these attributes caused Chunghwa Picture Tubes (CPT), a Taiwanese maker of HDTV display subsystems, to look to FPGAs and an electronic system-level approach to hardware development and implementation.

CPT has tapped Celoxica and its HDTV development kit, which includes the DK Design Suite of system design tools, the PixelStreams video and imaging IP library, and the RC Series of programmable development platforms. ?Chunghwa used our tools to model the video-processing algorithms and then to implement them in FPGAs,? says Jussel. ?This got them to market much more quickly than if they'd had to wait 18 months for ASIC respins.

Through use of Celoxica's PixelStreams IP library, CPT's engineers were able to very quickly implement pre- and post-image processing on an RC340 development board that supports the HDTV standard. As a result, the system's function was rapidly verified. CPT's proprietary image-processing algorithms were written in C code and implemented in parallel onto the board-level development hardware using the DK Design Suite tools.

Hide comments

Comments

  • Allowed HTML tags: <em> <strong> <blockquote> <br> <p>

Plain text

  • No HTML tags allowed.
  • Web page addresses and e-mail addresses turn into links automatically.
  • Lines and paragraphs break automatically.
Publish