TSMC And MAPPER Announce Fabrication Milestone

Amsterdam and Delft, The Netherlands: Taiwan Semiconductor Manufacturing Company (TSMC) and MAPPER Lithography have announced that a pre-alpha MAPPER tool located on TSMC's Fab 12 GigaFab is successfully printing features previously unachievable using current immersion lithography technology.

TSMC recently expanded its Maskless Lithography team and has been working with MAPPER engineers at Fab 12 to integrate electron beam direct write capabilities into manufacturing processes for development of future technology nodes.

"TSMC is always searching for the most cost effective manufacturing processes," said Dr. Shang-Yi Chiang, TSMC senior VP of Research & Development. "The results coming from our project with MAPPER have met aggressive objectives and mark a significant achievement in our Multiple-E-Beam Direct Write program that covers all viable Multiple-E-Beam technologies. Based on these encouraging results, we are convinced that the Multiple-E-Beam technology is one of the technologies to become the future lithography standard."

MAPPER's CEO, Dr. Christopher Hegarty, added: "Having TSMC as our launch customer is of great benefit to MAPPER. Now that we have an operational tool at TSMC and we simultaneously intensify our efforts in bringing MAPPER's technology to market, we are supremely confident that electron beam direct write will be successfully introduced into high-volume manufacturing processes."

MAPPER develops lithography machines for chip manufacture that cut costs by eliminating the photomask operations and using massively parallel electron beams, thereby providing the high resolution of electron beam at high production throughput. Current lithography machines use photographic techniques to create minute electrical circuits smaller than 1/100th of a human hair on a silicon wafer. They use a mask that contains the blueprint of the chip and transfer this pattern on to a photosensitive layer. However, Mapper says the photographic techniques used are limited in the resolution they can provide and are no longer adequate for future generations of semiconductors.

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