Debendra Das Sharma

Senior Principal Engineer, Intel

Debendra Das Sharma is a Senior Principal Engineer, as well as the I/O Technology and Standards Group Director at Intel. Sharma provides technical and managerial leadership for interconnect technologies, including USB and PCIe, as well as specialty architectures for Cache Coherency, MCP, SoCs, and Rack Scale. He is also a leading contributor for the PCI Express specification.

Joining Intel in 2001, Sharma led the development of server chipsets Twincastle, Seaburg, Tylersburg, and Boxboro, as well as helped integrate PCIe 3.0 technology into server CPU chips. Prior to joining Intel, Sharma was with HP participating in the development of server chipsets, including Superdome. Sharma earned a PhD in Computer Engineering from the University of Massachusetts, in addition to a Bachelor’s in Computer Science and Engineering from the Indian Institute of Technology. Sharma holds 63 patents related to CPUs, chipsets, interconnects, cache-coherence protocols, MCPs, SoCs, and microarchitectures.

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