At the 4th China International Automotive Electronics Products & Technologies Show (AES) in Shanghai this week, Freescale Semiconductor launched the three-member MPC563xM family of 32-bit Power Architecture microcontrollers and the 16-bit MC9S12P series. Both offerings target applications in China and other emerging markets.
The MPC563xM family represents the first fruits of Freescale’s collaboration with STMicroelectronics. Manufactured on 90 nm technology and targeting powertrain applications in small (one- to four-cylinder) engines, the MCUs integrate CO2 emissions control capabilities that leverage the digital signal processing (DSP) engine built into the Power Architecture e200 core. The DSP capability is said to enable engine designers to maximize fuel economy and performance while minimizing engine “knocking,” resulting in a 3-5% reduction in CO2 emissions.
“Powertrain is becoming the new hotbed of innovation in the automotive world,”” said Freescale automotive microcontroller marketing manager Kevin Klein. “The driving factors are the requirements for improved emission control, especially in China, where there are pollution issues because of the growing number of vehicles. Also, the rising cost of oil has captured lots of peoples’ attention.”
Freescale noted in its announcement that government regulations in emerging markets such as China and India are moving toward requiring automakers to manufacture more efficient engines that emit fewer harmful emissions. A 5% reduction in automotive CO2 emissions could remove as much as 165 million tons of CO2 from the atmosphere each year. Freescale estimated that CO2 represents more than 80% of greenhouse gas emissions in the United States alone.
Based on single-input/multiple-data (SIMD) processing techniques, the DSP functionality that can help reduce CO2 emissions can also be used for patented sensor diagnostics schemes that address on-board automotive diagnostics.
For automotive developers currently using 16-bit MCU solutions for powertrain control, the MPC563xM family provides a cost-effective 32-bit solution that extends processing performance beyond 16-bit capabilities.
The new devices offer 768 KB, 1 MB and 1.5 MB flash memory options with ECC; 81 KB of SRAM, and a core with 40 MHz, 60 MHz and 80 MHz options. “These would have been high-end devices not long ago, but now they are well-suited for use in 4-cylinder engines and entry-level transmissions,” said Klein.
The devices feature variable length encoding (VLE) capabilities to help reduce code footprint by up to 30%, and a 32-channel eTPU2 (enhanced time processor unit) to offload complex timer applications from the CPU. A hardware decimator is included to minimize DSP calculations and reduce CPU load by up to 5% by leveraging the DMA as an anti-knock filter.
Peripherals include two FlexCAN, two eSCI, and two DSPI interfaces interfaces; a 34-channel dual analog-to-digital converter; junction temperature sensor; 32-channel DMA controller; 196 source interrupt controller, and Nexus IEEE-ISTO 5001-2003 Class 2+ (eTPU2 Class 1). The devices require a single 5 V power supply and are available in 100 LQFP, 144LQFP, 176 LQFP, 208 MAPBGA and VertiCal Calibration System package options.
The MPC563xM is Freescale's first powertrain device family with a quad flat package (QFP) option. Visible pins on a QFP make the package easy and affordable to install, inspect and repair, without requiring infrared and X-ray inspection technology. The MPC563xM devices are software compatible with Freescale's existing MPC55xx family, which enables code sharing that can help reduce development costs.
Freescale said its MC9S12P family, with integrated controller area network (CAN) functionality, combines the performance benefits of a 16-bit MCU with the pricing, power consumption, and electromagnetic compatibility features of an 8-bit device.
MC9S12P MCUs are designed to provide a “feature-rich entry point” into the 16-bit CAN market. They target cost-sensitive central body control applications in China and other emerging markets. Examples include window lifts, seat controllers, sunroofs, door modules, low-end anti-lock brake systems (ABS), electronic power steering (EPS) and watchdog control.
Based on an S12 core and 32 MHz bus, the S12P family offers on-chip flash that scales from 32 KB to 128 KB, with ECC. The family offers a migration path to more powerful S12X devices, enabling developers to scale their designs as flash memory and performance requirements increase.
Other features include up to 6 KB RAM and 4 KB DataFlash with ECC; an MSCAN module that supports CAN 2.0 A/B; an SCI interface that supports LIN; an SPI interface; an 8-channel, 16-bit timer; a 10-channel, 12-bit successive approximation analog-to-digital converter; a pulse width modulation module with six 8-bit channels; a phase locked loop (PLL) frequency multiplier; a 4-16MHz internal RC oscillator, and an autonomous periodic interrupt.The S12P devices are available in a 7 mm x 7 mm 48-pin “punch” QFN packaging option that is optimized for space-constrained applications. By offering exposed leads, QFN punch packaging enhances visual inspection during final assembly and helps minimize the need for X-ray inspections.