Freescale Semiconductor has introduced the MPC5121e, a 32-bit system-on-chip (SoC) optimized for high-performance, power-sensitive applications that require complex graphics, multimedia and real-time audio processing. Built on Freescale’s 90 nm, low-power CMOS Power Architecture technology, the MPC5121e is the newest member of Freescale’s mobileGT processor family, which is used for telematics.
Mike McCourt, vice president and general manager of Freescale’s Microcontroller division, said the automotive-qualified (AEC-Q100 standard and TS14969) SoC combines a 400 MHz e300 Power Architecture core with a dedicated PowerVR MBX Lite 2-D/3-D graphics core and a 32-bit programmable RISC-based multimedia acceleration core, operating at up to 200 MHz, optimized for audio processing. McCourt said Freescale plans to offer a version of the MPC5121e without the 2-D/3-D graphics core.
“The combined horsepower of these cores makes this processor ideal for next-generation applications that require sophisticated displays, graphics/multimedia acceleration, network connectivity and mass storage,” McCourt said, adding that the SoC is suited for driver interactive vehicle applications as well as for telematics.
The e300 Power Architecture core provides performance up to 400 MHz and 760 MIPS. It includes a 32 kb instruction cache and a 32 kb data cache and features a double precision floating point unit and dual integer units. The PowerVR MBX Lite 2-D/3-D graphics core supports 3-D texturing and shading and includes the PowerVR Vertex geometry processor (VGP Lite) for high-performance vector processing. An integrated display controller supports liquid crystal display/thin film transistor (LCD/TFT) displays with resolution up to 1024 x 768.
The processor’s fully programmable multimedia acceleration core is designed to enhance the performance of compressed audio formats such as MP3, AAC, WMA and Ogg Vorbis, and to optimize performance of real-time applications. The acceleration core also supports sample rate conversion, noise reduction and acoustic echo cancellation, which are key features for speech recognition and in-vehicle hands-free applications based on Bluetooth wireless technology.
The MPC5121e also features 12 programmable serial controllers supporting UART, SPI, AC97, I2S; an SDRAM DDR-I/DDR-II/mobileDDR memory controller; a 10/100 Fast Ethernet media access controller (MAC); three I2Cs; a PCI 2.3 interface; a dual USB 2.0 on-the-go (OTG) controller with an integrated high-speed PHY; a serial advanced technology attachment (SATA) controller and a parallel advanced technology attachment (PATA) controller; four CAN 2.0A/B modules; a 64-channel intelligent DMA I/O controller; a Sony/Phillips digital interface format (S/PDIF) serial audio interface, and a secure digital host controller (SDHC) supporting MMC/SD/SDIO protocols.
McCourt said the multicore architecture enables fast system throughput without driving clock rates and power consumption to excessive levels. “(The architecture) balances high performance with low operating power consumption for lower system cost and high reliability, and low standby power consumption for automotive system designs,” he said.
McCourt said 128 kb of on-chip SRAM and embedded memory buffers contribute to balanced system performance and system bus throughput while reducing latency demands. Processing performance is enhanced by well-balanced system resources for the e300 core, graphics core and multimedia acceleration core, as well as the DDR-I/DDR-II/mobileDDR memory controller with integrated 64-channel DMA support.
The mobileGT Alliance includes tool suppliers such as Wind River, QNX and Green Hills Software, as well as software and hardware companies. RTOS, software drivers, middleware and application solutions are expected to be available when the SoC begins sampling late in the second quarter.
Other application development aids include the CodeWarrior Development Studio mobileGT processor edition and a LinuxBoard support package optimized for the mobileGT architecture and the MPC5121e development platform. Packaged in a 516-pin, 27 mm x27 mm – 1 mm pitch PBGA, the MPC5121e is designed for application code compatibility with existing solutions based on the MPC5200 architecture.