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Spansion, TSMC agree to drive MirrorBit flash technology below 40 nm

Spansion and TSMC have agreed to begin joint development of variations of Spansion’s MirrorBit technology at 40 nm and below. Spansion will use the variations to expand its applicability in new areas, while TSMC plans to bring Spansion's advanced flash memory technologies to volume. The companies have a prior agreement for 110 nm and 90 nm MirrorBit technology. TSMC has been producing Spansion flash memory wafers at 110 nm since the second quarter of 2006. Production on 90 nm MirrorBit technology is expected to begin in mid-2007 on 300 mm wafers.

MirrorBit is said to offer a simpler memory cell and to be easier to manufacture compared with floating-gate NOR technology. Compared with traditional floating gate, the technology offers higher yields and scales more easily to higher densities, according to Spansion. Spansion is currently shipping MirrorBit quad (four-bit-per-cell) technology.

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