Embedded World 2015 Preview

Embedded World 2015 Preview

The theme for the 2015 Embedded World in Nuremberg, Germany, is the “Internet of Things.” Sounds a lot like the 2015 Consumer Electronics Show (see “CES 2015 In Review”) that had almost a full hall associated with wearable technology (see “Wearable Tech at CES Unveiled 2015”). Like CES, there were so many that it was hard to keep track of them all.

64-bit ARM

Applied Micro will be showing off their 64-bit, 2 GHz HeliX 2 System-on-Chip (SoC). The quad core system (Fig. 1) is compliant with ARM's 64-bit V8 architecture (see “Delivering 64-Bit Arm Platforms”). It has a shared, 2 Mbyte, L3 cache but each core has its own 256 Kbyte L2 cache with ECC support. The L1 cache has parity. The 1089-pin Heat Spreader Flip Chip Ball Grid Array (HFCBGA) chip supports IO virtualization with up to 16 virtual functions (VF).

Figure 1. Applied Micro's 2 GHz quad core HeliX 2 SoC is compliant with ARM's 64-bit V8 architecture.

It has the usual high performance peripheral complement including USB 3.0 with integrated PHY, PCI Express Gen 3 and a SATA 3 port along with a smattering of UARTs and other serial and parallel interfaces. Networking is its strength though. It has a 10G SMGII Ethernet MAC along with a pair of 1G interfaces with classification and virtualization support. The classification engines (CLE) support flow, CoS, and port-based classification at line speeds. They also support Receive Side Scaling (RSS). The CLEs work with the Queue Manager/Traffic Manager (QMTM) that provides efficient packet management. The crypto offload engine includes a true random number generator (TRNG).

Mini-ITX motherboard

Embedded World will not all things ARM although a lot of products in the wearable arena will sport those processors. For more conventional embedded applications, Kontron was showing off its KTQM87/mITX with long term availability (Fig. 2).

Figure 2. Kontron's KTQM87/mITX handles Intel's 4th generation Core processors.

The KTQM87/mITX uses Intel's QM87 chipset. The board supports up to 16 Gbytes of DDR3 RAM with ECC support. There is a PCI Express Gen 3.0 slot as well as two Mini PCIe slots that also support mSATA Gen 3.0. Additional non-volatile storage support includes two SATA Gen 3.0 interfaces with RAID 0/1/5/10 functionality. The board has a pair of gigabit Ethernet interfaces and one supports with Intel's AMT 9.0 management interface.

Generating qualifiable software

Adacore will show off their QGen software that is designed to generate qualifiable and customizable code from Mathwork's Simulink and Stateflow models (Fig. 3). This is important in a range of industries such as automotive, aviation and military that require high-integrity, real-time systems. It includes support for DO-178C at Tool Qualification Level 1 and for ISO 26262 at TCL3 (developed in compliance with a safety standard).

Figure 3. Adacore's QGen generates Ada SPARK or MISRA C-compliant code from Simulink and Stateflow models like this.

QGen can address a number of model property issues like run-time errors that include integer overflow, signal ranges out of bound, division by zero, and so on. Logical errors such as conditions that are always true or false is another. It handles functional and safety properties modeled using Assertion blocks.

QGen is integrated with Adacore's GNATemulator and GNATcoverage. These allow processor-in-the-loop (PIL) testing and structural coverage analysis support without any code instrumentation.

Software validation

Argosim will display its new Stimulus modeling and simulation environment (Fig. 4). Stimulus uses a high-level, constraint-based, real-time language to express requirements in natural language. An algorithm-based simulation engine generates and analyzes the executable traces that satisfy requirements. This allows discovery of incorrect, ambiguous, missing, or incomplete requirements before the design phase starts.

Figure 4. Argosim's Stimulus modeling and simulation environment was simulating a drone system.

Dr. Bertrand Jeannet, Argosim's CTO, will present a paper on “Debugging Real-Time Systems Requirements: Simulate the “What” Before the “How”. It shows how system architects can debug and validate functional real-time requirements early before the design phase begins. This allows engineers to reduce specification errors, process iterations, and overall design costs.

LTE gateways

Sierra Wireless will highlight their rugged, next-generation AirLink GX450 mobile gateway (Fig. 5) and ES450 enterprise gateway. The ES450 provides similar functionality as the GX450 but it targets less rugged environments. They work with most major carriers including Verizon, AT&T, Sprint, Bell, Telus and Rogers.

Figure 5. Sierra Wireless' AirLink GX450 mobile gateway has a 1 Gbit Ethernet interface for linking this LTE gateway to a local network.

The GX450 addresses applications like vehicle environments where devices need to meet IP64 levels for resistance to dust and water ingress as well as the MIL-STD-810G specification for shock, vibration, temperature and humidity. It is also immune to most harsh electrical transients often found in vehicle power sources.

These 4G LTE gateways can handle up to 5 VPN sessions at a time. WiFi and GPS support is optional. They work with Sierra Wireless' AirVantage Management Service that provides remote configuration, update management and system monitoring support.

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