FPGAs ARMed And Dangerous

You might be hard pressed to find any 7400 transistor-transistor logic (TTL) these days but they provided generations of hardware designers like myself with a modular design environment. Schematics and logic diagrams were the norm. I still have boxes of MSI TTL and CMOS like the 4-bit 74181 ALU (arithmetic logic unit). I built my first design project at Georgia Tech using a wire wrap board and four 74181's when I designed my first 16-bit computer. It had a 16 word register file using similar MSI storage.

It had a simple RISC architecture and programs fit into Intel 1702 UV EPROMs. It was what I could get my hands on at the time. It didn't get many programs because programming was in binary. Writing an assembler would have been another project.

Building something from the ground up like that isn't practical any more because those parts are not available. It was something that could be built on a breadboard with jumper wires. These days designers can turn to FPGAs. It is definitely faster and cleaner. The designs can be similar but everything is on a chip. No wiring required.

It is actually pretty easy, comparatively speaking, to design your own soft core processor for an FPGA. There are even software tools for generating compilers and linkers for custom systems. FPGAs provide a great learning platform although most colleges just skip this step and use off the shelf processors.

Standard soft core processors with complete software development tool suites have been around for decades. The latest are quite advanced and a good reason that most FPGA projects include at least one processor core.

Hard core processors in FPGAs used to be for high end chips with Power cores. This has definitely changed with ARM cores becoming the FPGA processor core de jour. They can be found on chips from three FPGA vendors so far.

Microsemi's SmartFusion (see FPGA Combines Hard-Core Cortex-M3 And Analog Peripherals) targets microcontroller applications. The 32-bit Cortex-M3 is one of the most popular microcontroller platforms around. Like many micros, the SmartFusion chip includes hard core digital peripherals but it also has an impressive analog subsytem. A hard core micro makes more sense if the chip provides a designer with the peripherals needed for an application but the SmartFusion chip makes more sense if custom logic is required. It also lets the FPGA fabric do what it can be designed to do, the heavy lifting that would otherwise require a higher performance processor.

Arm Cortex-A9 cores are higher performance than the Cortex-M3 and they are found in the latest smartphones and tablets. They are also the hard cores in the Xilinx Zynq-7000 EPP (see FPGA Packs In Dual Cortex-A9 Micro). Actually there are two MPCores in the FPGA. Like the SmartFusion chip, there is a standard complement of digital peripherals and a high speed connection to the FPGA fabric. These chips also high the high end of the FPGA market with high density FPGAs and high speed SERDES.

Altera has moved into this space as well, also with a Cortex-A9 approach (see Dual Core Cortex-A9 With ECC Finds FPGA Home). Altera announcement brings dual cores to its 28nm Cyclone V and Arria V FPGA lines. One of the big differences between it and the Xilinx chips is Altera's use of ECC memory.

Altera had already mixed high end processors with their FPGAs. The E600C (see Configurable Platform Blends FPGA With Atom) has an Intel Atom and Altera FPGA on a multicarrier chip. The two chips communicate via two PCI Express x1 links. It is a powerful platform but significantly more expensive than an integrated chip like the Arm-based solutions.

I think I may still have that TTL board somewhere in the basement. It will probably stay there since playing with these new ARM-based FPGAs is a lot more productive and more fun. What I had not talked alot about here is the software tools available for these platforms. This is probably more important to developers than the quality of the FPGA design tools that are already at a very high quality level. It will be interesting to see what new engineers and programmers will be able to build with these ARMed FPGAs. They may be ARMed but the only danger is what designs they might inspire.

TAGS: Dev Tools
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