Sometimes, hardware hasn’t been delivered yet, or it’s otherwise difficult to obtain. Instruction accurate (IA) simulators, or virtual platforms, allow developers to get their software running without having access to the hardware. Also, an IA simulator’s debugging features may be more robust than those available in real hardware, even hardware with JTAG support. Virtual platforms are more than just an instruction set simulator (ISS) since they provide peripheral simulation as well.
Download this article in .PDF format
This file type includes high resolution graphics and schematics when applicable.
Virtual platforms are big business because software needs to run on systems-on-chip (SoCs) before the hardware is available. Most application software can be developed on similar or more generic platforms, but a lot of software really needs to be tested on the actual platform or the best simulation available. Many alternatives are available, such as Wind River’s Simics. Tools like Synopsys’ Processor Designer only create an ISS, although they also work with SystemC models to create transaction level models (TLMs) that simulate the entire SoC.
Some of these tools are available in time-limited evaluation versions. This is great for developers trying to determine whether a particular tool will meet their needs, but less so for someone trying to get a handle on what a virtual platform offers.
- Virtual Platform At Work On Next-Gen Spacecraft
- System Simulator Runs Software Backward
- Full-System Simulator Creates Virtual Test Labs
- Delivering 64-Bit Arm Platforms
- Platform Security Processor Protects Low Power APUs
OVPsim is a full system simulator supported by Imperas. It is available via Open Virtual Platforms (OVP), where you can find many open-source models. Free for non-commercial use, it is a closed-source package, but most of the models it runs are open source.
Of course, Imperas would like developers to take advantage of the commercial version. It adds features and tools like a multicore debugger or the QuantumLeap parallel simulation accelerator, which employs a new synchronization algorithm designed to handle the latest multicore designs.
The commercial version also provides ARM TrustZone support. TrustZone is becoming more important. It is even part of AMD’s latest Beema and Mullins accelerated processing units (APUs) in its Cortex-A5-based Platform Security Processor (see “Platform Security Processor Protects Low-Power APUs” at electronicdesign.com).
The performance of the free OVPsim ranges from 100 MIPS to 1000 MIPS. It is compatible with the commercial version and works with SystemC TLM2.0. QuantumLeap runs over 16,000 MIPS.
Typically IA simulator tools like OVPsim work with standard debuggers and development environments like Eclipse (see the figure). More advanced debuggers can sometimes take advantage of features found on the virtual platforms such as exposing internal system states that would not be available to the normal debugger or even on the hardware.
The latest models for OVPsim are for ARM’s new 64-bit, ARMv8 processors, the Cortex-A53 and Cortex-A57 (see “Delivering 64-Bit Arm Platforms” at electronicdesign.com). Many Cortex-A53 and Cortex-A57 designs have yet to make it past prototype silicon, so there are significant advantages to having access to these simulators.
OVPsim has models for a wide range of platforms. For example, they include soft cores for FPGAs like Xilinx’s MicroBlaze and Altera’s Nios. ARC, MIPS, and Power architectures also have coverage as well as chips from Renesas. OVPsim runs on Windows and Linux.
Embedded developers should be familiar with simulation technology. OVPsim is one way to gain that experience.