The ColdFire processor architecture, a popular embedded platform, is now available as a single-chip microcontroller. Motorola's ColdFire MCF5282 packs 512 kbytes of flash memory, 2 kbytes of instruction cache, and a complete complement of communications, digital, and analog peripherals.
Built-in Ethernet media-access controllers (MACs) and controller-area network (CAN) controllers make the 32-bit MCF5282 an ideal platform for network applications. The instruction cache can be configured to operate as a 1-kbyte program and 1-kbyte data cache.
The MCF5282 has the power and peripherals to be the heart of Ethernet/CAN gateways, industrial control nodes, point-of-sale equipment, and remote monitoring systems. Its large flash memory and SRAM leave plenty of room for applications after adding a real-time operating system (RTOS), network protocol stacks, and device drivers. Smaller microcontrollers often have insufficient memory, limiting the kinds of Web-based interfaces that can be handled.
Extensive networking support comes with the chip. The Ethernet MAC works with 10- and 100-Mbit/s interfaces. Also, the FlexCAN controller interfaces with 16 message buffers and handles CANs. The queued serial peripheral interface (SPI) can link the MCF5282 with SPI devices, while the I2C controller does the same for I2C devices. Point-to-point links can be implemented via the three built-in UARTs.
This combination of network interfaces lets the MCF5282 support large Ethernet networks and more local CAN networks. SPI and I2C provide chip-level and board-level networking support.
By leveraging the three DMA channels, the communication interfaces and most of the other peripherals can be controlled. Data servicing capabilities, which are often lacking in other 8- and 16-bit microcontrollers, are provided by the DMA support. Also, the DMA channels can be used with the 16-bit timers for background pulse-width modulation support.
The eight-channel analog-to-digital converter supplies the analog support. The 10-bit outputs are queued, and the system can be programmed to perform a sequence of conversions. It also can be programmed to repeat the process, which reduces processor overhead.
The MCF5282 single-chip solution is targeted at many existing ColdFire and 68K-based designs. It employs the same processor architecture and peripherals found on other Motorola chips. A larger complement of on-chip peripherals is the main difference.
Software Is Part Of The Package: The ColdFire MCF5282 comes bundled with an RTOS and a TCP/IP network protocol stack. The standard binary version of the RTOS is available at no charge. A configurable version has an additional cost, as does full source code. All three versions are royalty-free. Supported network protocols include IP, UDP, TCP, ARP, DHCP, ICMP, SMTP, HTTP, and TFTP.
The chip contains a JTAG interface, but this is primarily for board-level testing. The background debug mode (BDM) interface is used for software development.
Metrowerks' CodeWarrior is included in the development kit and uses the BDM interface for debugging. The CodeWarrior integrated development environment (IDE) handles C, C++, and Embedded C++. It's the same platform that supports other 68K architectures, including Motorola's ColdFire, MC683xx, and DragonBall processors. CodeWarrior runs on Windows 98, ME, 2000, and NT.
Price & Availability The ColdFire MCF5282 costs $17.86 in OEM quantities. Samples and an evaluation kit will be available in early 2003. The evaluation kit costs $850. Production quantities will be available in the second quarter. The MCF5282 comes in a 17- by 17-mm, 256-ball (1-mm pitch) mold-array-process BGA package. The operating-temperature range spans—40°C to 85°C. A flashless version will be available as well.
Motorola Inc.,
1303 East Algonquin Rd.,
Schaumburg, IL 60196;
(847) 576-5000; www.motorola.com.
| COLDFIRE MCF5282 | |
| Processor core | 66 MHz V2 ColdFire, 2-kbyte instruction cache |
| Flash memory | 512 kbytes |
| SRAM | 64 kbytes |
| External memory | SDRAM controller |
| Digital peripherals |
10/100 Ethernet MAC, FlexCAN controller area network interface, four-channel DMA, four 32-bit timers with DMA capability, eight 16-bit timers with DMA capability, three UARTs with DMA capability, I2C bus controller, queued serial peripheral interface (QSPI), four periodic interrupt timers |
| Analog peripherals |
eight-channel 10-bit queued analog-to- digital converter (QADC) |
| Development tools
|
Metrowerks' CodeWarrior, bundled RTOS and network protocol stack, third-party tools support |