Wireless Systems Design

ADC Takes On Cellular Base Stations

This 80-Msample/s, high-speed, 14-b analog-to-digital converter utilizes direct IF sampling to slash cost, power, and space from today's multicarrier communication systems.

Cellular base stations currently present many challenges. They remain complex in design and operation while carrying a significant price tag. Weighing heavily on this cost and complexity are the individual cellular base-station components. Among these components are power amplifiers and analog-to-digital converters (ADCs). Consider, for example, that most base stations employ a traditional two-mixer system. The signal comes into a mixer and goes through an initial intermediate-frequency (IF) downconversion. It then must go through a second mixer and IF downconversion stage. In applications that require several bands of signals to be digitized at once, this multi-step process puts considerable strain on the front-end electronics that lead up to the ADC.

Such complexity poses a real problem as multicarrier communication systems become the norm for today's cellular base stations. Isn't there a more cost-effective, higher-dynamic-performance, less complex way of addressing this issue? According to Linear Technology Corp., the answer is yes. The company's new 80 Msample/s, 14-b LTC1750 ADC provides a viable solution for multicarrier communication systems and other wireless applications, such as repeaters, 911 locators, test equipment, and military radio systems (FIG. 1).

Based on an existing family of Linear Technology ADC products, the LTC1750 offers designers a dramatic improvement in dynamic performance. It undersamples up to 500-MHz input frequencies. It also delivers 84-dB spurious-free dynamic range (SFDR) with 140-MHz inputs. Its signal-to-noise ratio (SNR) is 71.1 dB. With 350-MHz inputs, the LTC1750 delivers 74-dB SFDR (FIG. 2).

Like its family members, the LTC1750 boasts a robust CMOS architecture and an extremely linear transfer function. Its architecture, however, sports a newly redesigned sample/hold amplifier and circuitry. The LTC1750 also sets itself apart through its ability to provide wide input bandwidth for direct IF digitizing applications along with excellent AC performance. A wide dynamic range enables it to detect small signals in the presence of larger signals. By directly digitizing the first IF, this high-speed ADC eliminates the second IF downconversion stage in applications like cellular base stations. The result is significant savings in board space, cost, and overall design time. The ADC also promises to eliminate a considerable amount of power.

A variety of features puts the LTC1750 ADC ahead of the competition. For example, a simplified interface between the SAW filter and the ADC makes it relatively easy to use. In addition, the fact that it's pin strappable provides for a flexible reference. Below the surface are a number of significant characteristics that would impress most designers. Examples include low distortion, low noise, and low jitter. How are these features possible?

For starters, an on-chip programmable-gain amplifier (PGA) allows multiple input ranges to optimize device performance. The specific characteristics of the LTC1750/LTC1749 include selectable input ranges of 1.35 Vp-p to 2.5 Vp-p. As a result, the LTC1750's input can be specifically configured for a given application (FIG. 3). Low noise is achievable at the larger input range. Meanwhile, the smaller range lowers the gain requirements on the drive circuitry. It is therefore easier to meet the IP3 requirements. The LTC1750's lower range is smaller than anything else that's currently available: a 6.5-dBm drive related to a 50-(omega) CMOS input sample hold. Other comparable ADCs also claim to have low noise functionality. Yet such devices often require a larger signal to drive them.

If the input ever goes out of range on the LTC1750 ADC, the company says that an automatic indictor on the overflow pin kicks in. A connection to low-voltage digital signal processors (DSPs), FIFOs, or logic as low as 0.5 V is possible via a separate digital-output supply pin. The output buffers include n-channel and p-channel pull-ups, which allow them to interface with a wide range of logic voltages. This makes the digital interface compatible with 5-V, 3-V, 2-V, and 1.5-V logic systems. These buffers also offer internal damping resistors.

Among the other key features of the LTC1750 ADC are low jitter and low distortion at a very high input frequency. The device's ultra-low jitter of 0.12-ps RMS allows the undersampling of IF frequencies with minimal degradation in SNR. DC specs include ±3 LSB INL and no missing codes. The benefit of such functionality comes in the form of reduced noise and distortion.

Of course, noise and distortion are tradeoffs in any system. But it should be noted that the further one swings, the worse the distortion gets. In the case of the LTC1750 ADC, the noise level prevents the user from having to drive the signal up. In most ADCs, the signal must come in and be maintained throughout the remainder of the process. With the LTC1750, however, the signal comes in and is gained up. With this approach, further processing doesn't pay a penalty for a smaller signal swing. Because the swing isn't that substantial, neither is the distortion. Ultimately, neither the noise nor the distortion significantly impacts the ADC performance.

In addition to the LTC1750 ADC's impressive AC performance, this device has a DC specification that comes complete with specified linearity. This is a crucial point, as specifying linearity is a difficult, time-consuming task. It requires vendors to collect a large number of samples. Many are simply not up to this chore. Having a complete specification, such as the one provided by Linear Technology for its LTC1750 part, guarantees that designers will be able to fully push the ADC to its performance limit.

The LTC1750 comes in a 12-b and 14-b version. The 12-b, 80-Msample/s version is dubbed the LTC1749. Each device is pin-for-pin compatible, allowing the user to take one part out and drop the other part in. This capability makes possible multiple price/performance products with one design. For other high-speed applications, this pin-compatible family extends from 25 Msamples/s to 80 Msamples/s and from 12 b to 14 b.

Both the LTC1750 and the LTC1749 devices are now available. Powered from a single 5-V supply, both ADCs consume 1.45 W of power. Each device comes in a 48-pin TSSOP package for both the commercial and the industrial temperature ranges. In 1000-piece unit quantities, the LTC1750 sells for $32.30 apiece. The LTC1749 is priced at $19.55 each in 1000-unit quantities.

Linear Technology Corp.
1630 McCarthy Blvd., Milpitas, CA 95035-7417; (408) 432-1900, www.linear.com.

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