The mobile-phone market totals a billion new handsets each year, so any chip that can cut system cost deserves attention. With this in mind, STMicroelectronics' AD MUX I/O family of NOR flash memory multiplexes address and data on the same pins (see the figure). These devices drive down the cost of mobile platforms, enabling cell-phone manufacturers to penetrate cost-sensitive markets.
The address and data pins are multiplexed, so the data bus can be expanded with no increase in pin count. The overall system pin count also may be reduced without a performance hit. A smaller package and reduced pin count ultimately would lead to a smaller pc board, lowering the system cost.
Built on existing successful 1-and 2-bit/cell NOR flash memory technology, the devices in the AD MUX I/O family come in 130- and 90-nm process technologies. They're available as standalone flash memories and as hybrid flash and PSRAM subsystems.
They come in LFBGA88 (8 by 10 mm), LFBGA107 (8 by 11 mm), or VFBGA44 (7.5 by 5mm) packages that support burst and multibank architectures. Standalone 1-bit/cell AD MUX I/O devices come standard with 16- to 64-Mbit flash, while the 2-bit/cell devices range from 128 to 256 Mbits.
The subsystem devices may be ordered in one of two configurations. Each configuration includes 128 Mbits of NOR flash and either 64 or 32 Mbits of PSRAM. Additional subsystems will be made available shortly to provide a wider variety of flash and PSRAM configurations.
Samples of the AD MUX I/O family are available now, with volume production
expected in the next few months.