Wireless Systems Design

C Synthesis Nurtures FPGA Development

This Synthesis-Tool Package Gives The Designer An Inexpensive And Effective Method For Evaluating C-Based Methodologies.

The design starts that use reconfigurable processors—namely field-programmable gate arrays (FPGAs)—continue to grow in popularity. In fact, a recent Gartner Dataquest study found that FPGAs and application-specific signal processors (ASSPs) will be the leading design activities for many years to come. This news bodes well for designers of reconfigurable design tools and processors alike.

One such provider of system-level electronic-design-automation (EDA) tools is Celoxica Limited. Recently, this company announced a new C-language synthesis-tool package. This package provides a low-cost way for designers to realize their C-based algorithms in silicon.

The tool—dubbed the Platform Developer's Package (PDP)—essentially brings inexpensive C-language synthesis to FPGA development. In doing so, it gives designers a way to evaluate C-based methodologies. At the same time, this tool allows designers to work on applications for which one specific FPGA-board target is sufficient.

As the entry-level version of Celoxica's DK Design Suite of system-level tools, PDP provides cycle-accurate design simulation and C-based synthesis to FPGA chips. Basically, PDP couples the DK Design Suite base package with the Handel-C simulation environment. It adds to this C-based synthesis for one specific FPGA-board target.

Handel-C is a fully synthesizable language superset of ANSI-C. It adds simple constructs to the DK Design Suite for algorithmic compilation directly into optimized FPGA logic or register-transfer-level (RTL) descriptions. Common C-based languages can be modified to the Handel-C format by following well-documented procedures and guidelines.

As project requirements grow, the PDP package can be easily upgraded to support multiple FPGA families or additional boards and processors. Support for other languages, like SystemC, also is available. As one of its specialties, Celoxica compiles a variety of C-based languages directly into FPGA hardware.

The company made this expertise part of its Software-Compiled System Design methodology. This approach vows to improve design productivity. From C-based descriptions, it generates device-optimized FPGA hardware directly to Electronic Design Interchange Format (EDIF) structural netlists or human-readable RTL.

In addition to simulation and synthesis capabilities, the PDP software includes a user interface for integrated development (see figure). The DK Design Suite's Integrated Development Environment (IDE) user interface provides facilities for basic project file management, source-code editing, and simulation and debugging. Once the Handel-C code is ready, compilation can be done directly to an FPGA-hardware EDIF netlist or Hardware Description Language (HDL) -like VHDL or Verilog.

Using the simulation environment, it's possible to simulate mixed C, C++, and Handel-C code. This environment also provides co-simulation with other development and modeling environments, such as HDL simulators, System-C models, Matlab/Simulink, and Instruction Set Simulators (ISSs). Using common testbenches, designers can migrate from specification to hardware and/or from software to hardware in a stepwise manner.

Such an approach helps to ensure a design's validity throughout the development process. The co-simulation capability enables the use and reuse of existing intellectual property (IP). It also allows the integration of HDL where it is required.

Another feature of the PDP offering is a board-support-package application programming interface (API). This package provides optional processor support for ARM, Xilinx MicroBlaze, Altera NOISE, and IBM PowerPC devices. PDP board-support packages are available for the Celoxica RC200 and RC2000 development boards as well as for Altera's NIOS. The RC200/RC2000 boards include a Xilinx Virtex-II FPGA. They also provide environments for the evaluation and development of FPGA applications.

The RC200 programmable system-on-a-chip (SoC) board connects to the development software via a built-in 10/100 Ethernet port. It is well suited for a wide variety of prototyping systems. The RC2000 is a PCI board. It can be used for the testing and acceleration of algorithms in hardware.

PDP sells for $1999. It may be purchased with an FPGA development board. Both the board and the design software are available immediately.

Celoxica Limited
20 Park Gate, Milton Park, Abingdon, Oxfordshire, OX14 4SH, United Kingdom; +44 (0) 1235 863656, FAX: +44 (0) 1235 863648, www.celoxica.com.

Hide comments

Comments

  • Allowed HTML tags: <em> <strong> <blockquote> <br> <p>

Plain text

  • No HTML tags allowed.
  • Web page addresses and e-mail addresses turn into links automatically.
  • Lines and paragraphs break automatically.
Publish