Chip Package Teams Up PowerPC With SSRAM

June 1, 2001

Designed for embedded control applications where density and performance are critical, the WED3C7558M multi-chip package combines a PowerPC 755 RISC processor with 1 MB of SSRAM L2 cache configured as 128Kx72 on a single interposer. The 300-MHz processor and two 128Kx36, 150-MHz synchronous pipeline SRAM are flip-chip attached on a 255 CBGA or optional CCGA (ceramic column grid array) package, resulting in a 60% savings in board space compared to discrete approaches. Footprint-compatible with the 745 BGA, the module measures 21 mm x 25 mm or 525 mm2 compared to 1,329 mm2 for a discrete design. Lead times run from 12 to 16 weeks and price is under $900 each/1,000.

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