Electronic Design

Clock IC Uses GPS 1-pps Signal For Datacom Sync

Designers can use the widely available 1-pps Global Positioning System (GPS) satellite signal derived from onboard atomic clocks to achieve super-accurate clocks for critical networking and datacom applications. An IC or rack-mount receiver delivers the signal, but designers then need to synchronize it with the other clocks they need to generate and distribute for the system.

The AD9548 clock generator/synchronizer from Analog Devices takes the 1-pps signal in and generates up to four synchronized outputs. It targets optical and wireless network nodes such as basestations, cable infrastructure, and other datacom equipment that requires the precision of a Stratum 2 clock.

Basically, the chip is a digital phase-locked loop (PLL) using a direct digital synthesis (DDS) output and a group of programmable dividers to provide wide flexibility in generating the exact needed clock frequency. The reference input is a 10- to 20-MHz temperature-compensated crystal oscillator (TCXO) or oven-controlled crystal oscillator (OCXO).

An internal clock multiplier boosts the reference to the desired level to be determined by the outputs. The chip then accepts up to four pairs of inputs whose frequency can be anything from 1 to 750 MHz. The DDS drives the digital-to-analog converter (DAC) to create the output. The internal PLL filter cut-off frequency is fully programmable from 0.001 to 100 kHz. Something around 0.1 Hz is needed for a 1-pps GPS input.

An external low pass filter cleans up the output, which can be as high as 450 MHz. The filtered signal is then applied back to the chip, where it drives four channel dividers. These programmable 30-bit integer and 10-bit fractional feedback dividers then let designers produce up to four different clocks for the system.

The outputs may be configured as single-ended CMOS or as differential low-voltage differential signaling (LVDS) or low-voltage positive-emitter coupler logic (LVPECL). Jitter output, which is cleaned up, can be as low as 300 fs. The chip’s automatic holdover circuitry maintains a valid precise output even when some or all of the input references fail. An onboard EEPROM stores all the divider and other setup info for quick, easy reconfiguration.

The AD9548 is housed in an 88-lead lead-frame chip-scale package (LFCSP) and operates from –40°C to 85°C. It is available now for $24.82 in quantities of 1000 units.

Analog Devices Inc.

www.analog.com/pr/AD9548

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