For those who deal with electronic interfaces today, the word is serial. Across the board, new interfaces are being created and new versions of existing interfaces are being defined in serial form. Parallel interfaces are limited to CPU internal and CPU-to-CPU support functions. Serial interfaces in new designs are serving virtually all other I/O functions.
Historically, clock rates have limited the speed that data could be moved down a wire. RS-232, an older serial interface, used a single line or wire to move information, basically one bit per clock cycle. To improve this, parallel style interfaces were created, using multiple wires to move many bits per clock cycle. These interfaces use single-ended or unbalanced transmission methods.
Interfaces for external I/O like SCSI increased speed by doubling the clock speeds (the 8-bit SCSI-2) and then the number of lines (the 16-bit SCSI-3). SCSI's physical size then became a barrier, and increasing the number of wires further wasn't practical. Higher clock rates and even double clocking of data were needed to raise speed.
Today, SCSI is running into another physical limit—skew, the time difference in the bit arrivals on the receiving end. The primary cause is path length difference, though variation in the electrical properties of materials can also contribute. As speeds have increased, this time interval has decreased. A level of skew that was initially acceptable causes errors as speeds increase. Even with improvements in cable manufacturing, minute differences exist and attempts to reduce these path length differences further become impractical.
Similar situations exist with internal buses. Today's PCI bus uses 64 lines running at up to 266 MHz. This consumes significant board real estate and requires larger connectors and a very high number of pins on the bus interface chips. The same factors that limit SCSI also affect internal buses, where the physical problem of size (rather than skew) dominates.
Serial interfaces resolve many of these issues. Chips can now produce extremely fast clock signals, vastly increasing the speed at which individual bits can be transmitted. Use of a single, very fast lane minimizes skew issues by multiplexing many discrete parallel channels into a single serial channel. Though two wires are used in a differential interface, their physical lengths can be controlled tightly, resulting in very tight within-channel skew. This is much easier than trying to sync many discrete parallel channels. The receiving device actually extracts the clock from the data stream, eliminating any mismatch and producing a receiver that's robust to skew.
Differential, or balanced, signaling (not practical for most parallel systems) greatly improves noise immunity. With low-voltage differential signaling, faster signal transitions can be used. In rough terms, one differential pair running at 2.5 Gbits/s now can handle the amount of data moved by the current SCSI U320 interface.
Serial interfaces also function with simpler physical constructions, both for external I/Os and internally on new motherboards and backplanes, in terms of size and number of lines required. Of course, this change brings its own problems, such as wiring complexity on backplanes and the need for better high-speed performance for the components in a system.
Board layouts for high-speed serial interfaces also become critical. Cable assemblies, though simpler in terms of the number of lines, are now vital in the transmission system and may need characterization as part of the manufacturing process. Connectors themselves must be characterized and designed for very high-speed signal transmission. Ironically, as data transmission needs continue to increase, very high-speed serial links will be run in groups, almost in parallel, though not synced together.
System designers are increasingly turning to serial interfaces for demanding applications. The venerable Ethernet interface has been joined by USB and IEEE 1394 or FireWire in more and more applications. Fibre Channel supports storage needs, and InfiniBand is coming. Serial attached SCSI (SAS) is in development. PCI Express, HyperTransport, and RapidIO are being applied to internal system I/O needs. The word for I/O is truly becoming serial.