Electronic Design

FPGA-Based Accelerator Addresses Compute-Intense Tasks

Many EDA applications, particularly simulation, require a great deal of computing horsepower to offset the long runtimes associated with complex designs. GiDEL’s PROCStarIII family of FPGA-based accelerators could serve to break the computing logjam. The system’s Stratix III FPGAs provide reconfigurable hardware implementation of users’ algorithms to deliver application-specific processing acceleration. The system also delivers very high-speed SoC prototyping and debugging for pipelined dataflow-intensive SoCs.

The PROCStarIII can be configured with a broad range of Stratix III FPGAs to match both the computational capacity and speed of the system to user’s requirements. The Stratix III E FPGAs are rich in arithmetic and memory elements and ideal for DSP and memory intensive applications such as image and signal processing. The Stratix III L-FPGAs are ideal for SoC prototyping.

Systems can be configured with one to four Stratix III 80E, 110E, 260E or 150L FPGAs. Eight PCI Express lanes provide 2 Gb/s of bandwidth for host communications. There are eight SODIMM slots for up to 16 Gbytes of on-board memory, and there’s 256 Mbytes of double-data-rate memory for each FPGA. Typical system clock speeds range from 150 to 350 MHz.

The PROCStarIII system is available to ship in the fourth quarter of 2007. Contact GiDEL directly for pricing, which varies with the system’s configuration.

GiDEL

http://www.gidel.com

 

Hide comments

Comments

  • Allowed HTML tags: <em> <strong> <blockquote> <br> <p>

Plain text

  • No HTML tags allowed.
  • Web page addresses and e-mail addresses turn into links automatically.
  • Lines and paragraphs break automatically.
Publish