Get Up To Speed On Xilinx FPGAs

Aug. 8, 2007
Avnet highlights the Virtex-4 FX PCIe evaluation board in its Xilinx Speedway Design Workshops. Technology Editor Bill Wong stopped by Avnet to check out its high-speed serial workshop.

I recently had a chance to check out one of Avnet’s Speedway Design Workshops and their Virtex-4 FX PCIe Development Kit. The Speedway Design Workshops are half- or one-day courses that touch on specific design aspects using Avnet’s hardware like the PCEe Development Kit. They are not in-depth training courses for the uninitiated. Rather, they are introductions for experienced designers in need of a starting point for dealing with new technology like high-speed serial interfaces in FPGAs. First we take a quick look at the board used in this particular course, “Developing with V-4 RocketIO Transceivers.” You can check out this and other courses on Avnet’s Web site. Xilinx Virtex-4 FX PCIe Development Kit Avnet’s Xilinx Virtex-4 FX PCIe Development Kit can be used to develop a wide range of high-speed serial interfaces, often with minimal support hardware. The board is based on Xilinx’s Virtex-4 FX FPGA family and is available with various sizes of FPGAs. Pricing starts at $2495 with a Virtex-4 FX60 chip. The board is designed to show off the RocketIO support. It includes support for an 8-lane PCI Express interface, two SFP module connectors, a Serial ATA host connector, a CX4 connector, a general purpose SMA port, and 1Gbit Ethernet. There are five general-purpose RocketIO links available for customization. The PCI Express interface matches the PC card form factor, allowing it to be used with the latest PC motherboards while having enough high-speed serial interfaces to link to the outside world. The board has an EXP expansion slot developed by Avnet. It provides 168 high-speed, single-ended and differential user I/O. Standard or custom EXP modules can be added to the board to handle interface chores. The board also has a USB port, serial port and LCD panel as well as undedicated switches and LEDs. The board has 64Mbytes of SDRAM, 16Mbytes of flash, plus platform flash configuration memory. There is a JTAG and SystemACE interface. There is an on-board 100MHz LVTTL oscillator, programmable LVDS clock generators, and an LVTTL oscillator socket. User clock inputs can be brought in using differential SMA connectors. The board is a great prototyping platform since it can handle a range of high-speed serial bridging chores on its own. All the hardware and software design specifications, files, etc., are available online, so this board can actually be used as a template for other products and projects. Getting Up To Speed Richard Pensabene, a field applications engineer for Avnet, taught the class. Richard’s knowledge of Xilinx’s chips made him an ideal candidate to teach the course. Most of his tips came from experience rather than dialogue from the company. The course assumes basic knowledge of Xilinx parts and high-speed serial communication. Luckily there were a few other people at the course with this type of background, so I didn’t feel too out of place; I haven’t worked with FPGAs and these Xilinx chips on a regular basis. The hardware for the hands-on labs was setup already and we worked in groups of two. The software included Xilinx’s ISE design tools in addition to diagnostic software provided by Avnet. The tools, courseware and even schematics for the board are available online. The course started with some Q&A, an overview, details about the technology and what was coming up in the first lab. There were two labs in the course with about an hour to get through each. The labs concentrate on the ChipScope Pro Serial IO Toolkit for performing bit error ratio analysis. The labs run you through step-by-step. You can go back, but if you run too far a field initially, you will get lost: the toolset has a plethora of options. Some of the instructor’s more useful tips included the recommendation to stick with the 8B/10B encoding when working with this particular FPGA. It seems that other encoding schemes do not work quite as well at very high speeds like those encountered with PCI Express and Serial RapidIO — even though those schemes are more efficient. It has to do with the makeup of the FPGA, not the board used in the course or the software. If I were starting up a new high-speed FPGA serial interface design, this course would be a great starting point. Likewise, the development board would prove quite handy. We used it in a standalone mode but it can also be plugged into a PC’s PCI Express slot. This allows the board to act as a bridge between the PC and other high-speed serial interfaces from raw data to things like Gigabit Ethernet. Related Links Avnet Xilinx

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