JTAG In-System Programmer Operates At Speeds To 80 MHz

Nov. 1, 2002
Capable of concurrently programming CPLDs, FPGAs and flash memories on four JTAG chains at sustained clock frequencies up to 80 MHz, the PCI-1149.1/Turbo boundary scan, in-system programmer simultaneously verifies results in hardware at each

Capable of concurrently programming CPLDs, FPGAs and flash memories on four JTAG chains at sustained clock frequencies up to 80 MHz, the PCI-1149.1/Turbo boundary scan, in-system programmer simultaneously verifies results in hardware at each individual TAP. Interfacing with software to the PCI bus, a standard PC can be used to test devices, boards and systems that are compliant with IEEE Std 1149.1. Boundary scan test vectors are developed using the company's ScanPlusTPG test program generator and are executed directly on the system. The PCI-1149.1/Turbo comes with the ScanTAP-4 remote access pod, built-in self-test software, and Windows 95/98/ME/NT/2000/XP device drivers. Pricing starts at $9,000. CORELIS INC., Cerritos, CA. (562) 926-6727.

Company: CORELIS INC.

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