Low-Voltage Logic Family Cracks 2-ns Delay Barrier

Claimed as the industry's first logic family to achieve maximum propagation delays of less than 2 ns, the Advanced Very-Low-Voltage CMOS (AVC) logic family is optimized for 2.5V systems, but it's said to effectively support mixed-voltage mode systems thanks to its compatibility with 3.3V as well as 1.8V devices. An internal circuit reduces component costs and board space by eliminating the need for discrete damping resistors.The AVC devices feature the company's Dynamic Output Control (DOC) circuit, which automatically varies the output impedance of the device during signal transmission to reduce noise. The DOC circuitry provides enough current to achieve high signaling speeds, but quickly switches the impedance level to reduce the under- and over-shoot noise that's often found in high-speed logic devices. By eliminating damping resistors used for noise reduction, the AVC family removes a source of increased propagation delay. AVC logic also provides a power-off feature that disables outputs from the devices to support live or hot insertion of boards into system backplanes. Packaging options include TSSOPs and TVSOPs.