Electronic Design

Novel Memory Cell Merges DRAM Functionality And Nonvolatility

Combining the functionality of RAM and Flash storage into a single memory cell, a novel memory architecture promises lower system costs, lower system power, and smaller system footprints by eliminating separate memory types in a system.

O2IC Inc. of Cupertino, Calif., developed the McRAM storage cell using a standard 0.18-µm CMOS process with a simple proprietary process module added to create the nonvoltage storage element. Moreover, the new structure scales down to geometries below 0.1 µm, making it suitable for many ASIC applications.

The McRAM storage cell employs a double-gate transistor structure and incorporates the functions of flash memory and either DRAM or SRAM into a single memory cell (see the figure). The cell reads and writes like an SRAM, DRAM, or pseudo-SRAM, and it retains data when the power is off. Data retention is similar to the best flash memories, as test results show en-durance at over 1 million cycles and no over-erase issues.

The RAM and flash portions of the cell also are independently controllable. So, systems can read and write to the RAM without altering the nonvolatile storage, or data can be written into the nonvolatile portion of the cell without first being loaded into the RAM. Therefore, memories built using the McRAM cells could eliminate the flash and DRAM or flash and SRAM combinations found in many systems, lowering system cost, simplifying system architectures, and reducing the memory footprint on the pc boards.

Depending on how the McRAM structure is implemented, explains company CEO Kyu Choi, memory designers can optimize operation to deliver the high-performance of SRAM, or the high-density, lower-power performance typical of DRAM or pseudo-SRAM. When configured for 5-ns access times, the new cell is much smaller than that of a typical six-transistor SRAM memory cell. If the cell is configured for moderate performance DRAM replacement (55 to 70 ns access time), the structure is comparable to that of DRAM or pseudo-SRAM storage cells.

When data is stored in the nonvolatile portion of the cell (programmed), the cell current is just 1 µA—that's almost two orders of magnitude smaller than the current required by standard stacked-gate flash memory cells. Furthermore, the programming voltage is either 5 or 8 V, which also is lower than most other flash programming levels. The lower current means that the on-chip programming circuitry can be simpler, reducing the chip's design complexity.

Because the McRAM cell can use a foundry's standard logic process with the addition of a proprietary but relatively simple process step, memory arrays built with the McRAM cell can be employed as embedded memory blocks in ASIC applications. This lets system designers significantly simplify the system architecture, reduce component count, and lower overall system power and cost.

O2IC is working with two foundries—DongBu Electronics in Korea and TSMC in Taiwan—to offer the McRAM cells as part of the design library and manufacturing capability from each foundry. The company also is willing to license the technology.

For more information, contact the company at www.o2ic.com, or call (408) 255-1262, ext. 103.

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