Optical Links Eliminate Bulky Box-To-Box Cables

As data-bandwidth requirements continue to escalate in data-communications switches and routers as well as high-performance multiprocessor systems, moving data between systems and even within racks depends on ever-faster interfaces. Even hardwired backplane costs are escalating. As bus speeds rise, such backplanes may no longer be economical or practical. High-speed serial host adapters can move data from system to system at 10 Gbits/s. But they're still very expensive and not very cost-effective for short-range data transfers of 300 m or less. Furthermore, wide buses or flat cables that deliver differential data 128 bits at a time at speeds of 200 MHz or faster are often restricted to lengths of just a few meters. Creating such cables also isn't for faint-hearted designers.

To address these challenges, designers at Agilent Technologies have come up with parallel fiber-optic transmitter and receiver modules and a standard ribbon fiber-connector interface. Designers at the company took advantage of the dropping cost of moderate-performance optical interfaces. The interface cost has come down thanks to the availability of low-cost optical fibers, standardized transmitter and receiver modules, and the development of vertical-cavity surface-emitting laser (VCSEL) diodes. Additional help came from the availability of low-cost silicon to perform parallel-to-serial and serial-to-parallel conversions.

Agilent expects such modules to find a ready home in OC-192 10-Gbit/s very-short-reach (VSR) interconnects, Infiniband systems, and large multiprocessor system interconnects. The company also envisions them in use as even a common I/O that could replace legacy PCI and PCI-X interfaces.

Typically, the design of 10-Gbit/s serial adapters requires using expensive cleaved gallium-arsenide (GaAs) laser diodes and super-fast logic. Alternatively, high-performance backplanes often require creating complex controlled-impedance pc boards with over a dozen wiring layers and high-speed bus drivers. And, the high-speed cables must be well-designed to control impedances and provide shielding between adjacent-signal wires. Agilent's development is about to change all of that.

Several companies have already started offering portions of the solution that Agilent is providing. These companies are selling the silicon chips that perform the parallel-to-serial or serial-to-parallel conversion. Some have also begun offering the silicon along with the VCSEL emitters and photodetector arrays. Designers at Agilent, however, have gone several steps beyond this by introducing a more complete solution, including the parallel fiber-optic transmitter and receiver modules and a standard ribbon fiber-connector interface.

Not only can Agilent's modules deliver up to 12 independent high-speed transmitters or receivers in a single, very compact package, but they can do so at a very affordable price—about $25 to $30/gigabit of data bandwidth. Each channel in the HFBR-712BP transmitter module or the HFBR-722BP receiver module can transfer data at up to 2.5 Gbits/s. Therefore, a 12-channel module provides an aggregate throughput of 30 Gbits/s. The company also is working on a four-channel transceiver implementation.

Designed for very cramped quarters, the 12-channel transmitter or receiver modules are very compact, requiring a board area of only 38 by 14 mm (about 1.5 by 0.75 in.) per module (Fig. 1a). A full-bidirectional configuration (12 transmit and 12 receive channels) would occupy a board space of around 1.5 in. deep and about 3 in. wide, including a small space between adjacent modules.

The modules em-ploy a 6- by 12-pad ball-grid-array (BGA) connection/contact ar-rangement to the pc board on which they're mounted. The surface-mount-compatible BGA contact area uses a 1.27-mm ball pitch, which allows for a large number of connections in a small region. These connections include the interfaces to all 12 channels, the other signals required by the modules, and a large number of power and ground connections.

A single connector with a dozen optical fibers set to precisely align with the VCSEL array plugs directly into the socket that's part of the transmitter module (Fig. 1b). Similarly, the receiver module has a connector/socket arrangement that keeps the dozen fibers precisely aligned to the 12 optical detectors.

Currently, the commercial alternative consists of small form-factor 1-Gbit/s fiber-optic transceiver modules. These require a 14-mm wide space on the board for just one transmit and receive channel pair. In a terabit switch-router, a card delivering 100 Gbits/s of capacity would require 100 MT-RJ modules set side by side. That would add up to 1400 mm (55 in.). If squeezed onto boards that fit into systems housed in the popular 19-in. racks, three full-size boards would be necessary.

In contrast, only four pairs of the 12-channel modules developed by Agilent could deliver 120 Gbits/s. Plus, the four modules would need less than a 5-in. wide board to mount the modules side by side. That's less than a tenth of the area consumed by existing gigabit units.

Each transmitter module consists of an array of VCSEL diodes. Every channel in the array is driven by a three-stage amplifier/level-shifter/driver (Fig. 2). The actual drive stage is, in turn, controlled by a feedback loop that adjusts the drive level that the VCSEL diode receives. The circuitry allows the host system to control the drive current, or compensate for aging or other factors that deteriorate the light output. Signal inputs to the module include differential data inputs for the 12 channels, abundant power and ground connections, and four control and warning signals—transmit enable, transmit disable, reset, and fault.

Diffractive optics are used to precisely tailor the 850-nm light output to match the fiber. Agilent believes that this is the first array to fully take advantage of high-bandwidth multimode fiber. Optical power output of each channel spans a minimum of −8 dBm to a maximum of −3 dBm. Signal rise and fall times are 160 ps at maximum, while the interchannel skew is typically 100 ps.

With all 12 channels operating at 2.5 Gbits/s each, the transmitter module will consume a maximum of less than 2.4 W when powered by a 3.3-V supply. The receiver module consumes slightly less: 2.25 W. The integral heatsink used is designed to keep the module temperature to less than 80^oC with a 55^oC airflow of 1 meter/s. If the case temperature is below 70^oC (2-m/s, 55^oC airflow) during operation, designers at the company estimate that the module has a minimum lifetime of about 9 years. But if the case can be kept at 50^oC, the VCSEL endurance increases to over 32 years.

The receiver module combines GaAs PIN photodetectors and silicon-germanium (SiGe) signal-recovery circuits. The detectors have a sensitivity of −17 dBm to −18 dBm at 2.5 Gbits/s. Their basic bit-error rate is less than 1 in 10¹² bits.

Other specifications include rise and fall times of less than 160 ps, respectively. Interchannel skew on the receiver is typically less than 100 ps, while the data output rise and fall times are usually about 120 ps (150 ps worst case).

Data interfaces on both the transmitter and receiver modules are compatible with current-mode-logic (CML). All of the control lines are compatible with low-voltage TTL or low-voltage CMOS.

In a typical board layout, the transmitter and receiver modules are mounted on the rear edge of the pc board, while the electrical signals are routed to the closely-coupled custom system support logic that's developed by the customer (Fig. 3). That logic performs the clock and data recovery on the receive side and the system timing on the transmit side.

Agilent has also developed a quad serializer/deserializer chip to tie between the module serial data channels and the parallel bus channels. Users can add their own user-defined processing functions as well.

Agilent Technologies Inc., 350 West Trimble Rd., San Jose, CA 95131; Contact Larry Golub at (408) 435-6957; www.agilent.com.