Electronic Design

Optical Reference Design And Chip Set Melt Away Time-Consuming Tasks

Thanks to a multisource agreement, the XFP pluggable optical transceiver module lets designers pack more standardized transceivers on a line card. This small-form-factor design targets 9.95- to 11.1-Gbit/s operation and is protocol-agnostic. So, it's compatible with most optical networking systems, such as 10-Gbit/s Ethernet, Sonet/SDH, and 4-Gbit/s Fibre Channel.

Developed by Analog Devices, the XFP reference design and chip set lets designers cram lots of circuitry into a small package while balancing speed requirements with low power consumption and minimal jitter. Its receive amplifier, signal conditioning circuits, laser driver, and microcontroller combine to deliver these features (see the figure).

The receive optical subassembly comprises a PIN or Avalanche photodiode (APD) optical diode and a matching transimpedance amplifier (TIA). Made with silicon germanium, the AD2821 TIA operates from 3.3 V and supports PIN diode optical sensors. Featuring a bandwidth of 8 GHz, it contributes a maximum of 1.1 µA of noise and provides ­19-dBm sensitivity at 1310 nm. It also supports 850- and 1550-nm PINs and APDs. The chip's power-measurement circuit provides a received signal-strength indicator output.

The AD2928 signal processor sends and receives. It conditions and retimes the signals using a dual-loop, phase-locked-loop clock and data-recovery circuit. Jitter generation measures 6 mUI rms, jitter tolerance is 0.6 UI p-p, and the jitter transfer bandwidth is 2 MHz, all at OC-192 Sonet.

A pseudorandom bit source and loop feedback are built in to provide automatic self test. The input sensitivity is 6 mV. Other features include loss-of-signal and loss-of-lock indicators and an I2C interface for optional user control. Power dissipation is less than 750 mW. Later this year, ADI will offer separate transmit (ADN2827) and receive (ADN2826) path signal processors.

The company offers two laser drivers for the transmit optical subassembly. The ADN2525 is designed for distributed-feedback and Fabry-Perot side-emitting lasers. The eye margin is better than 20% for Sonet and over 40% for Ethernet applications. Power consumption is only 750 mW. Designed for VCSELs, the ADN2530 laser driver consumes only 300 mW.

The ADuC7020 analog microcontroller completes the reference design. Based on a 32-bit RISC ARM core, this chip contains eight channels of 12-bit analog-to-digital converters and four 12-bit digital-to-analog converters for monitoring and controlling the transceiver. The interface for all chips is differential current-mode logic. An I2C is used for external I/O.

The reference design includes a host board, I2C support, Gerber files, object and source code for the microcontroller, a GUI, and all technical documentation. The chip set costs $50 in high volumes.

Analog Devices Inc.
www.analog.com

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