Zuken’s Design Force tool is adept enough to handle design of system-in-package devices with through-silicon-vias on a PCB.
System design has long been a highly complex affair, often comprising multiple large FPGAs and/or systems-on-a-chip (SoCs) and frequently multiple printed-circuit boards (PCBs). System architects frequently turn to CAD-based packages such as Vizio and AutoCAD, and even Excel spreadsheets, to manage the upfront planning. You can do quite a bit of design work in a package like Vizio only to find that it doesn’t translate well into your downstream flow. The end result is a fragmented and disjointed design process.
With the launch of its Design Force tool, Zuken has completed its CR-8000 PCB design suite, which has been some seven to eight years in planning and creation. Design Force adds multi-PCB system-level design capabilities to the CR-8000 suite. It’s the “implementation” piece of the suite, joining System Planner, that was announced in September.
System Planner is an intelligent upfront planning tool that allows you to bypass the spreadsheets and CAD tools that architects often use for the early part of the process. It feeds directly into the design process, which means that designers do not lose the work that was done in those other programs. You retain, and feed forward, work you’ve done on logical and functional design and floor planning.
The tool provides a 3D view of the board design to show how it would fit into a cabinet. It also has facilities for bill-of-materials (BOM) planning. As a result, design teams arrive at better initial decisions that feed into the downstream process.
After System Planner, the next phase of the Zuken CR-8000 flow is Design Gateway, which is the circuit design tool. Design Gateway is the design front end for both the older CR-5000 and new CR-8000 suites.
The Design Force tool sets the CR-8000 suite apart from Zuken’s previous offerings. With the tool in place, the whole flow understands the entire system and not just its constituent circuit boards. If, for example, your system contains five circuit boards, the Design Force tool is aware of that and can drive multiple netlists. It is aware of the interconnections between the boards and does not force manual management of the interdependencies between them.
As the architect defines constraints, rules, and functions, these various system requirements become inputs to System Planner. Subsequently, these constraints are considered intelligently throughout the design flow. Beginning with the creation of an initial BOM, architects make better first-time decisions and then preserve design intent as they move forward.
An important aspect of Design Force is its ability to give users a 3D view of their layout. A 3D view is a big advantage when looking at the board stackup and checking the thickness of layers and dielectrics so impedances are correct. The 3D capability also is useful for embedded component scenarios and examining chip-package-board interfaces.
Users can seamlessly switch between 2D and 3D views of their board designs, taking advantage of the tool’s 64-bit processing and using a touch pad to navigate and zoom in and out. The 3D capabilities really shine when, for example, you want to move an embedded component from one board layer to another.
The tool is aware of design rules related to inner layers and cavities and can discern whether any of those rules are broken in the process of such design maneuvers, immediately alerting the user to the violation. It’s also adept at handling cutting-edge board technologies such as system-in-package devices with through-silicon vias (see the figure).
Some advanced design techniques involve placing die in the center of a board layer with microvias that extend halfway through the dielectric. Design Force can deal with such techniques. The chip package and board are designed within one environment, providing the ability to manage pin swaps and I/Os.