Electronic Design

PCIe Gen2 Clock Buffers Handle 5 Gbits/s With Very Low Jitter

Able to operate at the PCI Express (PCIe) Gen2 data rate of 5 Gbits/s, a new family of high-performance, zero-delay clock buffer products from Pericom Semiconductor Corp. supports Intel Xeon dual-core processor server applications. The devices provide from four to 19 separate PCIe outputs on one IC and exceed the Gen2 jitter requirements.

In independent testing conducted at a Tier 1 CPU chip-set vendor, the PI6C20800S outperformed competitive products by exhibiting less than 1.0 ps of additive rms jitter, according to Pericom. This low level enables designers of server platforms to meet jitter budgets with enough margin for production manufacturing.

The Gen2 clock buffer family includes the PI6C20400S with four differential outputs and the PI6C20800S with eight differential outputs, each with one spread-spectrum-compatible phase-locked loop (PLL). The PI6C21900 (18+1) and PI6C21900S (17+2) each provide 19 total differential outputs, using two spread-spectrum-compatible PLLs. This gives designers two separate frequency domains. The devices come in lead-free packaging and feature a high tolerance for electrostatic discharge.

The clock buffers can be combined with a Pericom server motherboard clock generator, such as the PI6C410BS, and a Pericom-Saronix 49SLMB high-stability crystal reference to provide a complete PCIe timing-tree solution for Xeon server applications. In addition, Pericom offers timing products to support SAS, SATA, and 1-Gbit and 10-Gbit Ethernet protocols routinely used within server platforms.

The Gen2 clock buffers are available now in volume production. In quantities of 5000, the PI6C20400S costs $1.35 each, the PI6C20800S is $1.50, and the PI6C21900 and PI6C21900S are $4.50. Samples, evaluation boards, datasheets, application notes, IBIS models, and additional information can be found at www.pericom.com.

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