Space FPGAs Break One-Million-Gate Barrier

Next-generation, radiation-tolerant RTAX-S FPGAs feature densities up to two million equivalent system gates or approximately 250,000 ASIC equivalent gates. The space-oriented, high-density packages provide hardened registers with single-event upset (SEU) immunity and error-corrected on-board RAM, with the embedded RAM exhibiting an upset rate of less than 1-10 errors/bit-day with error detection and correction (EDAC). Other features include inherent single-event latchup (SEL) immunity, less than 37 MeV-cm²/mg SEU capability, and a total ionizing dose (TID) performance in excess of 200 krads. Support for the chip is via the Core1553BBC, a MIL-STD-1553B bus controller intellectual property core that can interface to standard external transceivers. ACTEL CORP., Sunnyvale, CA. (888) 992-2835.