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Stacked DSP/Memory Simplifies Designs

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The DSP HeLP-Stack 3-D, stacked DSP/memory device claims to simplify system design and, via proprietary stacking technology, saves motherboard space equivalent to 50% of the TQFP footprint of the DSP device. The assembly combines a Texas Instruments fixed-point digital signal processor (DSP), a 4 Mb SRAM configured as 256K x 16, and a 10-MHz timing reference device. The entire configuration fits in the same 144-pin TQFP footprint as the DSP device with the SRAM and the timing reference stacked on top of the DSP.
The first device in the series, model DPHD15410SM16Q includes a TMS320VC5410PGE-100 DSP, 4 Mb of SRAM, a 10-MHz Timing Reference Device, and a 3.3V power supply. Features include a 10-ns access time and a four-pin LCC and 44-pin TSOP-2 stacked on top of the DSP. Sample quantity pricing is $150.

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