Electronic Design

Test Process Meets Requirements Of Probe Card Applications

Multitest’s UltraFlat process meets requirements for high parallel vertical probe card applications. In DDR3 apps, requirements for board flatness at wafer-level testing are critical and flatter PCBs require less compliance from the probe interface and reduce interface wear. UtraFlat allows maintenance of tight overall flatness tolerances by removing the bow and twist in the PCB. Unlike flat-baking that provides a temporarily flat PCB, UltraFlat provides a permanent overall flatness. Additionally, it typically complies with bow-and-twist requirements of 1%. MULTITEST ELECTRONIC SYSTEMS INC., Santa Clara, CA. (408)-988-6544.

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