Electronic Design
What’s Next After VPX?

What’s Next After VPX?

First introduced in 2007, the VPX (VITA 46/48) board and backplane standard quickly became established as the next-generation replacement for the venerable VMEbus. So what's next?

Download this article in .PDF format
This file type includes high resolution graphics and schematics when applicable.
Steve Edwards, Director of Product Management, Curtiss-Wright Defense Solutions

First introduced in 2007, the VPX (VITA 46/48) board and backplane standard quickly became established as the next-generation replacement for the venerable VMEbus. Upon its introduction, VME was itself almost 25 years old and recognized as the de facto standard for backplane-based systems designed for aerospace, defense, and industrial applications. More-demanding emerging applications, though, required support for serial fabrics, distributed, scalable compute architectures, and much greater data rates beyond VME’s pin-based connector’s capabilities. As a result, the VITA community came together to define a next-generation open standard based on the higher-bandwidth, wafer-style connector. The success of the resulting VPX standard stemmed from VITA’s approach for defining new open architectures through a consortium whose contributors include COTS vendors, prime contractors, and government. 

It took nearly a quarter of a century for VME to hit the performance ceiling that led to the development of VPX. Today, technology and application requirements are accelerating at an even faster rate. In less than 10 years, we’ve seen a leap from VME’s 3-Gbaud maximum throughput to VPX’s current support for10 Gbaud and beyond.

The speed of VPX is more than sufficient to handle today’s mainstream application requirements for demanding, deployed C4ISR applications, and is expected to deliver sufficient headroom for a decade or more. Even so, embedded-technology innovators and early adopters are already considering the direction to take for the next generation of open-architecture COTS system designs. This next phase will be influenced both by system designers’ ceaseless hunger for increasing throughput and lower latencies, and by the competing pressure to reduce costs and provide hardware with lower size, weight, and power (SWaP).

Looking forward, our expectation is for VPX, in its current state, to continue to satisfy most system requirements for at least another generation. The bandwidth limit for today’s version of VPX is likely to top out at around 14 to 16 Gbaud, at which point it will be able to support 14.0625 Infiniband and 16-Gbaud Gen 4 PCIe. That said, to optimize VPX’s ability to handle these higher bandwidth rates, standard VPX connectors will likely require more robustness in terms of signal integrity. In addition, new VITA standards-body work will need to be done to define design rules to enable VPX boards to support the 14- to 16-Gbaud range.

The Copper Question

Once we push past the 14- to 16-Gbaud level, VPX will confront the inflection points that indicate it must evolve to continue to be viable. As this work gets underway over the next few years, we will start to see how the next phase of VPX will take shape.

One key consideration will be whether backplanes will continue to be copper-based. Or will they, at this point of technological divergence, start to adopt an optical, or a hybrid of copper and optical, backplane approach? For backplanes to remain copper-based beyond the 14- to 16-Gbaud milestone (e.g., capable of supporting 25-Gb/s rates), it will require the identification of a new suitable connector with greater capabilities than today’s VPX connector.

The VPX6-1958 single-board computer, CHAMP-FX4 FPGA processor card, and CHAMP-AV9 Intel Core i7 DSP board are examples of OpenVPX modules that support high-speed 40-Gb/s bandwidths.

Higher Data Rates without Higher Frequencies

It may be possible, though, to significantly improve VPX bandwidth without replacing its current connector. The next generation of VPX could benefit from the use of more sophisticated encoding methods that enable higher data rates without greatly increasing the fundamental frequency.

A good example of this approach comes via 100 GbE. There are two types of 100-GbE backplanes defined in the new IEEE 802.3bj-2014 Ethernet Standard:

• 100GBASE-KR4 utilizes non-return-to-zero (NRZ) encoding (PAM2), so it operates at 25.8 Gbaud, with a fundamental frequency of 12.9 GHz.

• 100GBASE-KP4 utilizes PAM4 encoding with four voltage levels (conceptually similar to 1000BASE-T), so it operates at only 13.6 Gbaud with a fundamental frequency of only 6.8 GHz.

    Going Optical

    If, though, it does turn out that copper isn’t viable to get us to the next performance plateau, optical fiber is sure to become our best candidate. One challenge that we confront in making optical backplanes practical in the deployed embedded COTS market, though, is overcoming the associated SWaP issues.

    Today’s optical transceivers are fairly large and require a fair amount of power, both burdens that embedded designers are striving to avoid. On the other hand, some propose that a potential benefit of adopting optical interconnects is that they may make possible the elimination of the backplane itself. Copper will still be required to handle power distribution, though. In this view, an array of small boxes, distributed within a ground vehicle, for example, will be interconnected with optical interconnects via 40 GbE.

    A third option, which combines copper and optical, appeals to some as offering the best of both worlds. In this approach, low cost and proven VPX copper technology would be used to handle power, utility, and low-speed signals, while optical interfaces would support ultra-high-speed data rates and complex fabrics.

    The Dominance of 3U

    Regarding traditional module form factors, there’s little question that next-generation architecture will push toward increased use of the small-form-factor 3U, instead of 6U. Higher levels of integration and SWaP-related issues have already led to a significant increase in 3U design activity over the last five years. The amount of board real-estate provided by 3U hits a sweet spot for many of today’s applications.

    Test results for Curtiss-Wright’s Fabric40 Backplane 10.3-Gbaud data plane showed that all backplane links operated at 10.3 Gbaud with no bit errors at 10-12 BER. Margin increases by ~17 dB (factor of 7 eye height) without cable loopback and with 800-mV p-p TX amplitude, resulting in reliable, error-free operation.

    However, interest in standardizing smaller form factors in VITA hasn’t really gained traction. There was some activity around the VITA-75 initiative several years ago, but it didn’t really take off. While VITA-75 is most likely to be leveraged to address occasional requirements, it’s not expected to widely adopted mainstream approach.  A new small form factor marketing group in VITA, the VNX Marketing Alliance, was recently launched, but it remains to be seen if this effort will achieve broad acceptance beyond niche interest. If a need for an open-standard-based very small form factor does emerge, the solution is most likely to come from VITA. Still, the market might also adopt small “closed” LRU boxes built using non-standard modules or non-VITA modules (such as COM Express, PCIe104, Mini-PCIe, etc.).

    VPX as a “Living” Standard

    VPX was created to be a living architecture that evolves with changing requirements. Since its inception, new cooling techniques and technologies have been added to VPX. Since its introduction, the VPX standard, which was expected to predominantly embrace Serial RapidIO, has morphed to enable greater support for the fast-rising Ethernet. The next evolution of VPX will also surely benefit from the trend toward increased standardization of I/O. While there will be a need to support legacy I/O types, such as 1553 and SFPDP, in the years to come we expect to see greater use of optical and 10/40-GbE-based I/O. The upside of this trend is that greater standardization will significantly simplify I/O requirements.

    The good news is that VPX has successfully achieved a dominant position as the bus architecture of choice in today’s embedded aerospace and defense electronics market. It supports the open-architecture COTS approach demanded by the U.S. Dept. of Defense (DoD) to ensure the fastest access and deployment of cutting-edge, silicon-based proven solutions while keeping costs significantly lower than proprietary design alternatives. As mission requirements and technologies advance, VPX will evolve as it was designed to do. 

    In that sense, whatever follows today’s VPX will most likely still be considered VPX. It’s too soon to say that the next-generation architecture will also retain the name “VPX.” Nonetheless, the standard, as it’s known today, has unquestionably earned strong brand value and name recognition. What’s more, the ecosystem of vendors and customers for the next-generation architecture will almost certainly comprise the same group of companies and people that VPX does today. VPX served well as the evolution beyond VME because it addressed the same application space and customer base as VME. Similarly, the next stage won’t be starting from scratch, and will be an evolution of VPX. 

    With regard to rival technologies, we don’t today see any real contenders to the dominance of today’s VITA and VPX approaches. Some benign applications that were historically VME, such as shipboard electronics, are moving on the processing side to ATCA or commercial server blades, and we expect to see that trend to continue. But even in that benign space, there remains market growth opportunity for VPX.

    TAGS: Defense
    Hide comments


    • Allowed HTML tags: <em> <strong> <blockquote> <br> <p>

    Plain text

    • No HTML tags allowed.
    • Web page addresses and e-mail addresses turn into links automatically.
    • Lines and paragraphs break automatically.