ATM Chip Eyes 3G

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With the SAR-2K ATM adaptation-layer system-on-a-chip (SoC), wireless network operators and OEMs can efficiently transmit higher-quality and greater volumes of voice, video, and data over asynchronous-transfer-mode (ATM) networks. Targeted specifically at 3G wireless applications, this CMOS chip replaces up to five components. At the same time, it offers speed and performance enhancements that can save significant development time while lowering system costs. SAR-2K also boasts low power consumption, using less than 1.5 W of power in most applications.

Based on Agere Systems' COM-2 'Systems-to-Silicon' platform technology, the SAR-2K combines a 0.16-µm modular silicon process with a suite of intellectual-property (IP) cores and a robust design methodology. It integrates logic circuitry with over 4 Mb of an embedded high-density static-random-access-memory (SRAM) architecture. An integrated ARM9 core simplifies device management, along with the use of firmware based on the SSX5 kernel component of Real-Time Architect from Realogy.

The SAR-2K chip features ATM adaptation-layer (AAL) types 2 and 5 functionality with associated data buffering and context descriptors. It can be connected to a synchronous optical network/synchronous digital hierarchy (SONET/SDH) ATM access ring via a glueless interface to Agere's TADM04622 add-drop multiplexer. The AAL layer accommodates up to 2048 full-duplex connections via internal-context and data buffers. It also provides full-duplex AAL2 CID switching for rates up to 155 Mbps.

The SAR-2K's flexible hardware and software architecture allows for on-chip conversion of AAL2 flows to AAL5 flows, as well as AAL5 flows to AAL2 flows. Communication with the device is accomplished through a 32-b microprocessor interface. The system and network interface is through a 16-b UTOPIA-2.

Samples of the SAR-2K SoC, designated as TAAD08JU21BCLS2-DB, are now available. In quantities of 10,000, the cost will be $420 apiece.