A new chip based on the Internet Exchange Architecture (IXA) bridges the TDM bus to the IX bus of IntelÕs IXP1200 network processor. The new chip, called the TDM2IX, is designed for use in applications such as VoIP gateways based on the IXP1200. It converts serial TDM data from multiple sources over multiple lines into a parallel format for transmission over the IX bus to the IXP200. For maximum flexibility, the TDM2IX features two buffering modes, with the selection of these modes determining the number of TDM timeslots per 64-bit IX bus transfer. The bridge chip can accommodate up to 2,048 full-duplex timeslots when buffering four frames of the local TDM streams, or 1,024 full-duplex timeslots when buffering eight frames. Other features of the device include 85 MHz IX bus operation, support for all major TSI components, loopback for efficient diagnostics, and full IXP hardware handshaking. Implemented as a 0.35 micron ASIC in a 240-pin PQFP package, the TDM2IX is priced starting at $59 each/1,000. RADISYS CORP., Hillsboro, OR. (503) 615-1100.
Company: RADISYS CORP.
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